Larry has grown Sarcina from designing semiconductor packages for a few small companies, to doing package designs for top semiconductor companies around the world. From 2014 to 2018, Larry led the expansion of Sarcina beyond package design into final test and wafer sort hardware and software development.
Larry is a semiconductor… Read More
A quick Google search for “2.5D 3D IC” returns 669,000 results, so it’s a popular topic for the semiconductor industry, and there are plenty of decisions to make, like whether to use an organic substrate or silicon interposer for interconnect of heterogenous semiconductor die. Design teams using 2.5D and … Read More
In this third article about China’s role in the global semiconductor industry I analyse the current state of affairs of the Chinese semiconductor industry in different segments. In the previous articles, I looked at the possible effects of a US-China decoupling in the semiconductor industry and the impact of the Big … Read More
The current Coronavirus crisis is inflicting a lot of pain on people, companies, and governments. I hope I am not getting in trouble with my reasoning, but if you look closely, there are also some “positives” to the Covid-19 crisis.
– It is stress-testing our infrastructure and telling us where we need to improve – as country,… Read More
COVID-19 underscores the importance of US-based production for strategic industries
The COVID-19 pandemic has drawn intense focus on the need to repatriate pharmaceutical manufacturing back to the United States. The increased awareness that a strategic adversary manufactures or controls up to 80% of the active pharmaceutical… Read More
IEDM is a premier semiconductor conference so it was certainly appropriate for Samsung to do the keynote since they are the largest and one of the most innovative semiconductor companies in the world, absolutely.
Samsung is also one of the more interesting semiconductor companies since they do it all: chip design, semiconductor… Read More
With each new silicon process node, the complexity of SoC design rules and physical verification requirements increases significantly. The foundry and an EDA vendor collaborate to provide a “reference flow” – a set of EDA tools and process design kit (PDK) data that have been qualified for the new node. SoC design methodology … Read More
