Electrothermal Signoff for 2.5D and 3D-IC Systems

Electrothermal Signoff for 2.5D and 3D-IC Systems
by Daniel Nenni on 02-23-2021 at 6:00 pm

System-in-package (SiP) designs for high-performance computing (HPC), high-speed networking, and AI applications are extremely complex. To achieve maximum performance without exceeding tight thermal and power constraints, these chips must be designed within the context of the package and the overall system. Ansys 2.5D/3D-IC… Read More