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This webinar, in partnership with Easy-Logic Technology, is to address the complexities and challenges associated with functional ECO (Engineering Change Order) in ASIC design, with a particular focus on mixed-signal designs.
The webinar begins by highlighting the critical role of mixed-signal chips in modern applications,… Read More
Functional ECO (Engineering Change Order) continues to pose a persistent challenge for ASIC designers. To address this, Easy-Logic Technology, in collaboration with SemiWiki, is launching a webinar series focused on tackling ECO challenges across various ASIC design segments—starting with Mixed-Signal ASICs.
Why Mixed-Signal
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EasylogicECO Provides Built-In Stage-Based Functional ECO Flows to Reduce Turnaround Time
HONG KONG — June 6, 2025 — EasyLogic proudly introduces a groundbreaking stage-based ECO design environment, built into the EasylogicECO tool, to meet the rapidly evolving functional ECO (Engineering Change Order) demands of today’s… Read More
Dr. Wei has served as CEO & CTO of Easy-Logic since 2020. Prior to this role, Dr. Wei served as CTO since 2014 where he constructed the core algorithm and the tool structure of EasyECO. As the CEO, Dr. Wei focuses on building a strong company infrastructure. In his CTO role he interfaces with strategic ASIC design customers … Read More