Imagine that you’re working in a CAD group and just received a new library of a few hundred IP blocks and you needed to know if these blocks conform to your design and quality standards. There are many questions about library and IP quality:
- Are all of the views consistent (layout, schematic, HDL, test, timing, SPICE)?
- Are there
… Read More
The building blocks for every SoC are standard cell libraries that are assembled, designed and verified together. But how do we really know if all the data formats used during design are correct and consistent? To answer that question I spoke with Johan Peetersof Fractal Technologiesat DAC.
Johan Peeters, Rene Donkers
… Read More
Honestly speaking, there is no firm answer to this question, and often when we get confronted by our customers, we talk about the coverage reports. The truth is a product with high rate of coverage can very easily fail in customer environment. Of course coverage is important, and to be clear about the fact that the failure is not because… Read More
The tremendous growth in IC and SoC design complexity has now enabled engineers to place bilions of transistors on a single chip. To make that growth possible design teams resort to using libraries and semi IP provided by other groups in their company, or outside IP vendors. To lower risk, you must know that the IP being used in your… Read More
Very often we talk about increasing design complexities and verification challenges of SoCs. With ever growing design sizes and multiple IPs on a single SoC, it’s a fact that SoC design has become heterogeneous, being developed by multiple teams, either in-house or outsourced. Considering economic advantage amid pressure … Read More