Alchip is Paving the Way to Future 3D Design Innovation

Alchip is Paving the Way to Future 3D Design Innovation
by Mike Gianfagna on 11-19-2024 at 6:00 am

Alchip is Paving the Way to Future 3D Design Innovation

At the recent TSMC OIP Ecosystem Forum in Santa Clara, there was an important presentation that laid the groundwork for a great deal of future innovation. Alchip and its IP and EDA partner Synopsys presented Efficient 3D Chiplet Stacking Using TSMC SoIC. The concept of 3D, chiplet-based design certainly isn’t new. SemiWiki maintains… Read More


Collaboration Required to Maximize ASIC Chiplet Value

Collaboration Required to Maximize ASIC Chiplet Value
by Kalar Rajendiran on 09-24-2024 at 10:00 am

Chiplet Alchip

It is a well-known fact that chiplets provide several advantages over traditional monolithic chips. Despite these benefits, the transition to a chiplet-based design paradigm presents challenges that need coordinated efforts across the industry. In essence, collaborative efforts among various players involved are not … Read More


Synopsys and Alchip Accelerate IO & Memory Chiplet Design for Multi-Die Systems

Synopsys and Alchip Accelerate IO & Memory Chiplet Design for Multi-Die Systems
by Mike Gianfagna on 02-15-2024 at 6:00 am

Synopsys and Alchip Accelerate IO & Memory Chiplet Design for Multi Die Systems

Multi-die system design is clearly gaining momentum. Part of this momentum focuses on chiplets and a chiplet ecosystem. A “building block” approach for design will work better if there is a way to get verified, quality building blocks in the form of chiplets. The recent Chiplet Summit became an epicenter for this topic. The conference… Read More