Sign Off Design Challenges at Cutting Edge Technologies

Sign Off Design Challenges at Cutting Edge Technologies
by Tom Simon on 12-03-2020 at 6:00 am

Power and Ground Design Challenges

As semiconductor designs for many popular products move into smaller process nodes, the need for effective and rapid design closure is increasing. The SOCs used for many consumer and industrial applications are moving to FinFET nodes from 16 to 7nm and with that comes greater challenges in obtaining design closure. einfochips,… Read More


How to Deal With Seven Design Closure Issues

How to Deal With Seven Design Closure Issues
by Tom Simon on 05-02-2016 at 12:00 pm

The challenge of tracking design progress is a shared problem for individual designers, team leaders, and project managers. At each level the ability to step back from just reviewing error log files and seeing the arc of the whole design as it moves forward is valuable. The difficulty of seeing the whole picture is exacerbated when… Read More