A Six-Minute Journey to Secure Chip Design with Caspia

A Six-Minute Journey to Secure Chip Design with Caspia
by Mike Gianfagna on 11-11-2025 at 6:00 am

A Six Minute Journey to Secure Hardware Design with Caspia

Hardware-level chip security has become an important topic across the semiconductor ecosystem. Thanks to sophisticated AI-fueled attacks, the hardware root of trust and its firmware are now vulnerable. And unlike software security, an instantiated weakness cannot be patched. The implications of such vulnerabilities are… Read More


Large Language Models: A New Frontier for SoC Security on DACtv

Large Language Models: A New Frontier for SoC Security on DACtv
by Admin on 08-02-2025 at 11:00 am

On July 18, 2025, Mark Tehranipoor, chairman of the Electrical and Computer Engineering Department at the University of Florida and co-founder of Caspia Technologies, delivered a compelling talk at DACtv on leveraging large language models (LLMs) for System-on-Chip (SoC) security, as seen in the YouTube video. Addressing… Read More


Caspia Focuses Security Requirements at DAC

Caspia Focuses Security Requirements at DAC
by Mike Gianfagna on 07-07-2025 at 6:00 am

Caspia Highlights Security Requirements at DAC

As expected, security was a big topic at DAC this year. The growth of AI has demanded complex, purpose-built semiconductors to run ever-increasing workloads. AI has helped to design those complex chips more efficiently and with less power demands. There was a lot of discussion on these topics. But there is another part of this trend.… Read More