In a significant advancement for the semiconductor industry, Caspia Technologies announced the broad availability of CODAx V2026.1, its flagship RTL security analyzer. The new release strengthens early-stage hardware security verification and positions the company to deliver fully agentic workflows that automate vulnerability… Read More
Tag: Caspia
Webinar: Why AI-Assisted Security Verification For Chip Design is So Important
In this webinar, we will explore the growing threat that AI-fueled cyberattacks pose to chip designs and how to add expert-level security verification to your design flow to minimize those risks.
We will expose some of the details of the existential risk for electronic systems with real examples. We will then describe technology… Read More
A Six-Minute Journey to Secure Chip Design with Caspia
Hardware-level chip security has become an important topic across the semiconductor ecosystem. Thanks to sophisticated AI-fueled attacks, the hardware root of trust and its firmware are now vulnerable. And unlike software security, an instantiated weakness cannot be patched. The implications of such vulnerabilities are… Read More
Large Language Models: A New Frontier for SoC Security on DACtv
On July 18, 2025, Mark Tehranipoor, chairman of the Electrical and Computer Engineering Department at the University of Florida and co-founder of Caspia Technologies, delivered a compelling talk at DACtv on leveraging large language models (LLMs) for System-on-Chip (SoC) security, as seen in the YouTube video. Addressing… Read More
Caspia Focuses Security Requirements at DAC
As expected, security was a big topic at DAC this year. The growth of AI has demanded complex, purpose-built semiconductors to run ever-increasing workloads. AI has helped to design those complex chips more efficiently and with less power demands. There was a lot of discussion on these topics. But there is another part of this trend.… Read More
