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Job Description
IR Signoff for High Performance DSP Cores.
Signal EM & Power EM Signoff for High Performance DSP Cores.
Development of PG Grid spec for different DSP cores.
ESD Signoff for High Performance DSP Cores.
Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks
Validating the IR Drops using Static IR , Dynamic IR Vless & VCD Checks for validating Die & Pkg Components of IR Drops.
Working with SOC and Packaging Teams on Bumps Assignments / RDL Enablement / Pkg Routing Optimizations to improve overall PDN Design.
Good knowledge on PD would be helpful.
Perl, TCL Scripting Skills.
Good understanding on Power Integrity Signoff Checks
Proficient in scripting languages (Tcl and Perl).
Familiarity with Innovus for RDL / Bump Planning.
Ability to communicate effectively with multiple global cross-functional teams.
Skills
PDN
Redhawk
RHSC
Voltus at block level
SOC
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Speculative Execution: Rethinking the Approach to CPU Scheduling