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B
IBM leading-edge chip technology development has no internal or external customers.
But it doesn't seem to be going away, as hist78...
Thursday at 8:04 PM
T
Intel could re-enter the memory business if it really wanted to. Compared with 18A, DRAM is arguably much less complex from an execution...
Thursday at 8:02 PM
O
Yep. That's where my head is as well. I do believe that the AI age will permanently increase the demand for RAM; however, the dilemma...
Thursday at 7:00 PM
O
I chalk this up to the idea that most people working on AI models (including my Son who is just finishing up his PhD) work with Python...
Thursday at 6:54 PM
Yes, that is the private feedback I have been getting. 14A test chips are running but not full chip design. The TSMC inner design circle...
Thursday at 6:29 PM
K
One of these IBM news releases is generating a lot of confusion. AFAIK, no one is able to bond two device wafers, one with PMOS and one...
Thursday at 6:18 PM
B
So the next inflection point (with respect to supply) will be 3D DRAM?
But is 70% floor margin will exceed intel's hay day margin of...
Thursday at 6:16 PM
A
I'll give you 3 out of 4 here. IBM's track record is not good. Intel's process have been industry leading before 10nm and did have...
Thursday at 6:15 PM
A
If Google's AI is to be believed, someone must have enough of a PDK to run test silicon. But to your point, "lead customers" are...
Thursday at 6:08 PM
A
Yes that is what I thought as well and the 14A 1.0 PDK would be available by the end of the year. The customers I talked to said it was...
Thursday at 6:01 PM
B
Micron has supply agreements in place. they guarantee minimum margins similar to peak margins of previous cycle. I cant share the...
Thursday at 5:26 PM
T
This whole situation traces back to Intel’s misstep. Guess who approved the sale of its NAND business? Bob Swan. And where is he now...
Thursday at 4:18 PM
(I don't have much to add here except that I love these conversations - technical and financials :) ).
Thursday at 2:55 PM
Recognition reflects Panush’s leadership in anticipating the shift to hybrid AI inference and aligning Ceva’s Connect, Sense and Infer...
Thursday at 2:00 PM
Full Submission Deadline: July 27, 2026
The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier...
Thursday at 1:59 PM