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F
It was said to be ~40% better than 9020, but lagging behind the Qualcomm, Apple flagships.
Dec 14, 2025
F
Any indications of what "transistor performance class" the SMIC node would be? (current, leakage, etc)
Dec 14, 2025
B
Is Intel working on a sign language interpreter?
Dec 14, 2025
S
Maybe it's also as a TSMC's strategy to kill off Rapidus before its birth?
Dec 14, 2025
Is it possible AMD has customer(s) demanding a second source?
Dec 14, 2025
You heard it here first: AMD $AMD is planning to use Intel $INTC foundry to manufacture chips in the USA (not just packaging). During my...
Dec 14, 2025
S
very likely AMD needs to and has to do some exploration with Intel, while majority business now and in foreseeable future are still with...
Dec 14, 2025
S
thanks great info. For design point, BTC is not using higher Vdd due to overall power constraints? what was constraining it, DC cooling?
Dec 14, 2025
B
This article explained that some discrepancies may arise, depending on the layout assumptions, such as the ratio of NAND to Flip-Flop...
Dec 14, 2025
B
N+2 is 93 mtr.
It has 63nm gate pitch and 252nm cell height which revealed by Techinsight.
118 mtr mean ~27% density improve, very huge.
Dec 14, 2025
B
TechInsights has completed an exploratory teardown and process analysis of the Huawei Kirin 9030 application processor used in the new...
Dec 14, 2025
This is a pretty awesome list -- siliconbruh -- do you have offline data for older CPUs?
It would be fun to graph a 'downward trend'...
Dec 14, 2025
Any indications of what "transistor performance class" the SMIC node would be? (current, leakage, etc)
Dec 14, 2025
Actually TSMC N7 to N5 M2 pitch shrink (40 nm to 35 nm) wasn't enough by itself to justify a node change. Gate pitch shrink was also...
Dec 14, 2025
It seems like N+3 is truly G57H228 ( come from Techinsight decap data).
Hard to judge whether this is 5nm or not.
Techinsight think...
Dec 14, 2025