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Taiwanese chip giant TSMC has completed development of co-packaged optics (CPO) technology integrates a chiplet and an optical device, according to Taiwanese media UDN.
CPO positions the AI accelerator __ in this case Nvidia’s GPU ___ as well as the application specific IC with the optical engine, which converts electric signals into optical ones, in a single package.
TSMC will provide samples of the technology to its major customers Nvidia and Broadcom next year, UDN reports.
Current AI accelerators use copper interconnects which are facing bottlenecks as bandwidths become wider.
CPO supports up to 1.6Tbps bandwidth, 1.8 times wider than Gen 4 NVLink used by Nvidia in its GPUs right now. Power consumption is also up to 50% lower.
According to UDN, TSMC plans to scale up the production of CPO in 2026; Nvidia plans to adopt CPO technology starting with its GB300 chips launching in 2025 and the follow-up Rubin in 2026.
TSMC develops silicon photonics tech to ease overheating in GPU
Taiwanese chip giant TSMC has completed development of co-packaged optics (CPO) technology integrates a chiplet and an optical device, according to Taiwanese media UDN.CPO positions the AI accelerator __ in this case Nvidia’s GPU ___ as well as the application specific IC with the optical engine, wh
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