Array
(
[content] =>
[params] => Array
(
[0] => /forum/threads/tsmc-55nm-is-a-gpio-library-with-specialized-interface-capabilities.17333/
)
[addOns] => Array
(
[DL6/MLTP] => 13
[Hampel/TimeZoneDebug] => 1000070
[SV/ChangePostDate] => 2010200
[SemiWiki/Newsletter] => 1000010
[SemiWiki/WPMenu] => 1000010
[SemiWiki/XPressExtend] => 1000010
[ThemeHouse/XLink] => 1000970
[ThemeHouse/XPress] => 1010570
[XF] => 2021770
[XFI] => 1050270
)
[wordpress] => /var/www/html
)
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TSMC 55nm is a GPIO Library with specialized interface capabilities.
Administrator
Staff member
Our latest release on TSMC 55nm is a GPIO Library with specialized interface capabilities such as MIPI Soundwire and I2C. These deluxe cells include trimmable timing, clock phase selector, multiple input/output/ hi-Z modes, power down mode, analog test points, and ultra-low leakage regardless of power sequencing. A GPIO with a high-Voltage feature for VPP programming up to 6.5V is also available. Powers include a Core supply down to 0.9V and IO supply up to 1.8V. It is silicon-proven and passes 4kV HBM.
Link to Press Release