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It was a very interesting call and worth discussing. Here is the N7, N7 EUV, and N5 prepared statement. Something definitely got lost in the translation so I will need to listen to it but this is what I found interesting:
Now I'll talk about the N7+ and EUV. We believe we can extend the success of our 7-nanometer. N7 too is enhanced version. N7+, which will have 20% better density and greater than 10% power reduction. And N7+ will use few EUV layers to replace emerging decacore processor. As a result, fewer [indiscernible] can be used. As the N7+ will use more than 90% of the same tours with the N7 and N10, where we have fine tune all the advanced equipment to their optimum condition during their ramp-up, we believe we can leverage our production learning to N7+ and enjoy the industry's best deeper density among competitors of comparable technologies. Our N7+ silicon result today are very encouraging. Not only we have demonstrated equivalent or better performance in yield on both 256-megabit SRAM and on product like test vehicle when compared to N7 baseline, we have also demonstrated a tighter distribution of electrical parameters in the areas, where EUV is supplied. Since we maximize design [indiscernible] compatibility between N7 and N7+, our customer can minimize the IP porting effect - effort, I'm sorry.
A few customers have already planned to tape out the N7+ resource in second half this year and more in the first half next year. Our N7+ volume production is planned in 2019, which remain unchanged. We have made ready multiple EUV scanners to support not only N7+ development, but also N5 development. At N5, with more extensive use of EUV, we have obtained consistent double-digit yield on 256-megabit SRAM as well as our larger test chip. Our silicon data has proved or the benefits we expect from process simplification with EUV. Besides the silicon development, EUV technology continue to mature toward a high volume production with the improving source power toward the 250-watts goal, which we expect to achieve in a few quarters. Good progress continue to be made in the EUV infrastructure in the last few months. They include photoresist, mask defect in yield, pellicle defects in transmission. We are confident that EUV can meet our goal of 2019 volume production for N7+ and 2020 volume production for N5.
Yes TSMC seem to like ASML's EUV more and more. From the transcript:
This concludes my remarks, and I will now make comments on capital capacity and the profitability. I will start with CapEx and capacity. At our last conference, we stated our 2018 CapEx budget to be between $10.5 billion to $11 billion. We now see our CapEx to be between $11.5 billion and $12 billion. The increase is due to, number one, we plan to spend about $500 million more to increase our mask-making capacity to support our customers higher tape-out activities; and to spend about $300 million as prepayment for our high-end EUV tools.
If they mean prepayment for high-NA EUV this could mean 40%*270 MEuro ~ 135 M$ for a R&D tool to be delivered in 2021 (assuming they bought 1 tool; note that 4 high-NA R&D tools were bought by 3 customers, I suppose INTEL, TSMC and SAMSUNG) leaving some 165 M$ for prepayment of the options TSMC took on the HVM high-NA tools to be delivered in 2024.
Shared pain and shared gain, this has been the mantra of ASML for some years now....
I wonder who their customers will be if Apple stops at 7nm. The rumor is they do not like the price/performance of 7+. Another application will be needed to justify the increasing costs.
I wonder who their customers will be if Apple stops at 7nm. The rumor is they do not like the price/performance of 7+. Another application will be needed to justify the increasing costs.
"N7+, which will have 20% better density and greater than 10% power reduction"
I'm not sure this is a compelling enough value-add for Apple. TSMC will probably make an optimized version of N7 for Apple in 2019 and then N5 EUV in 2020.
On the US ban on sales of hardware, software, and technology to ZTE:
Unidentified Analyst: Okay. The second quarter guidance or full year guidance, is this factoring the ZTE recently been banned by U.S. to sale the chip to ZTE? Is this factorin into your model? That's my first question.
Mark Liu - Taiwan Semiconductor Manufacturing Company Limited - Co-CEO, President & Additional DirectorNo, we haven't.
The news just -- we got the just -- news just yesterday. But we think the effect is very, very minimal. Currently, we are still understudy what is the impact of ZTE suppliers, but for first glance that we look at, we have a very wide customer portfolio. So ZTE depends what they'resupplied from, and we have -- being everyone's foundry, we have very wide spread. So I think the impact will be softened much, much more. Much-- so we think that minimal impact on second quarter. You won't see the number change. You're going to see...
This is a very interesting answer. Originally I thought ZTE might be able to reduce the impact by switching their suppliers to other non-US companies, such as Mediatech or even their big Chinese brother - Huawei. Consequently it will potentially increase TSMC's revenue. But it's not that easy to materialize because companies such as TSMC, Mediatech, ARM, and Huawei all have various agreements for utilizing US companies' IP, software, and hardware. They have to follow the law and protect their own interest first.
I wonder who their customers will be if Apple stops at 7nm. The rumor is they do not like the price/performance of 7+. Another application will be needed to justify the increasing costs.
Apple pretty likely to stay with TSMC even if they skip 7nm+, they are big enough to get their own custom process if they aren't satisfied with the performance of 7nm+. But the thing to note is the cost from 7nm to 7nm+ shouldn't be that huge because of the amount of reuse that is likely between those two nodes. Even if it's just a 20% density improvement I'd expect 7nm+ to provide a lower cost/transistor vs 7nm.
TSMC added to the negative news in the semiconductor industry by lowering guidance of future revenue due to reduced cryptocurrency chips and soft mobile phone sales. In addition they said capex will be flat for the next several years in the range of $10B to $12B.
TSMC did up capex for this year for two one time exceptions. A $300M deposit for NA tools from ASML which we heard about yesterday from ASML in their report. They are also spending $500M more on mask production as the number of mask sets needed is increasing. (we also assume that the cost of EUV masks has added to this number as well). The ASML deposit doesn't result in any new tools or production capacity any time soon but rather is a prepayment place holder for TSMC's spot in line to get High NA tools whenever they come out.
This means that fabrication tool makers, such as AMAT, LCRX & TEL will not be seeing more incremental revenue out of TSMC any time soon. In fact, it is clear that there is a very high, 90%+, reuse rate of equipment between 10NM, 7NM & 5NM as the process flow is quite similar.
Ever the practical manufacturer, TSM is not pushing EUV so fast as there is no near term cost savings and the performance increase may not warrant a potential increase in yield risk. However when EUV does happen (in our view most likely for 5NM at TSMC) this will be a further slowing of dep & etch as excess tools will be freed up from today's multi-patterning steps that will be reduced on conversion to EUV.
So the TSMC news was not good for WFE tool makers (except litho and mask) but the implication of slowing crypto and mobile could also be a collateral negative for DRAM demand which has been driving WFE tools crazy. Thats not good.
On the bright side, TSMC said nice things about auto and IOT demand which is probably a better long term trend than "flash in the pan" crypto.
Seriously? You think a rumor like that is worth ANYTHING?
There are probably three people within Apple involved in this decision and none of them is talking, so...
And the very rumor is idiotic. Apple is probably the most cost-insensitive customer TSMC has. If they're not willing to sign up for 7FF+, who would be?
Apple's going to be making a new phone core anyway --- they haven't yet hit the point where that annual cadence isn't worth doing. Designing it for 7FF+ isn't going to be any more effort.
So are they willing to pay a dollar or five more per chip for 10% lower power and maybe say 10% higher performance (from more transistors, assuming same area)? Well, why not? The chip will have other improvements anyway from the usual architectural improvements, people will want to buy the phones, what's the downside?
name99 - I have heard that they want to manufacture chips much earlier in the year now to avoid embarrassing product delays that they have suffered over the last few years. Thus there is concern that 7nm+ will not be ready for HVM early enough in 2019, so Apple will skip it.
As for Apple being willing to pay a dollar or five more, they stiffed Imagination Tech on GPU IP to save 20 cents a chip...
name99 - I have heard that they want to manufacture chips much earlier in the year now to avoid embarrassing product delays that they have suffered over the last few years. Thus there is concern that 7nm+ will not be ready for HVM early enough in 2019, so Apple will skip it.
As for Apple being willing to pay a dollar or five more, they stiffed Imagination Tech on GPU IP to save 20 cents a chip...
From what I am told the Apple / Imagination relationship went bad so it was not just price. I'm not sure why Apple is skipping 7 EUV but they are. If you are designing to EUV it will not stay a secret. Too many people being trained and complaining about it. You may also see EUV design experience on LinkedIn profiles from people job hunting.
My bet is that TSMC is making a special version of 7nm+ for Apple without EUV. The TSMC Symposium is next week. We should know more then.
name99 - I have heard that they want to manufacture chips much earlier in the year now to avoid embarrassing product delays that they have suffered over the last few years. Thus there is concern that 7nm+ will not be ready for HVM early enough in 2019, so Apple will skip it.
As for Apple being willing to pay a dollar or five more, they stiffed Imagination Tech on GPU IP to save 20 cents a chip...
Timing, sure, that makes sense. That's a better argument than what I'm seeing about "10% performance boost is not enough".
Imagination Tech, that I don't buy. That was IMHO about moving to their own GPU that they controlled. Perhaps could have been avoided if Imagination were willing to push the GPU further and faster at the pace Apple wanted, but perhaps even that was impossible if Apple wanted really tight future GPU/CPU integration.
It seems like Apple has bad relationships with it's fabless design companies, no doubt in part because they have an internal fabless design group that is in direct competition with it's vendors. Unless Apple decides it's going to get into the semiconductor manufacturing business I'd expect them to continue to have a positive relationship with TSMC.
I agree with this analysis of @count. The only point I would dispute is the assumption that Apple only deals with TSMC. We know the S1 SoC (SoC for the first Apple Watch) was fanned on Samsung 28nm, and while we know nothing of the later watch SoCs, sticking with Samsung (to maintain good relationships with both fabs, and maintain skills should they need to move) would make sense.
(Same holds for the T1 and T2 which appear to be stripped down Watch SoCs.)
It’s even possible (and would make technical sense) that they fab the W1 and W2 (the wireless chips for things like AirPods) at GloFo.
(Again we know nothing about where these chips are fabbed).
I agree with this analysis of @count. The only point I would dispute is the assumption that Apple only deals with TSMC. We know the S1 SoC (SoC for the first Apple Watch) was fanned on Samsung 28nm, and while we know nothing of the later watch SoCs, sticking with Samsung (to maintain good relationships with both fabs, and maintain skills should they need to move) would make sense.
(Same holds for the T1 and T2 which appear to be stripped down Watch SoCs.)
It’s even possible (and would make technical sense) that they fab the W1 and W2 (the wireless chips for things like AirPods) at GloFo.
(Again we know nothing about where these chips are fabbed).
Yeah, I wouldn't expect Apple to use TSMC exclusively, since they will want to maintain a relationship with a secondary fab and have a little bit of negotiating power. They need to be able to credibly threaten to switch foundries, and that means throwing a few bones over to Samsung, just enough to keep them in the game. That said, I think it's fair to assume that TSMC will get the majority of Apple orders barring any major screw ups.
7+ is easier to design to so if you are starting a 7nm design this year it will be 7N+. It will also better prepare you for 5N which is full EUV and I can assure you 5N will be a VERY popular node.
We will know more at the TSMC Symposium later this month so stay tuned.
Another problem with AAPL is that a mere 20% boost might look bad. Their recent phones have been panned for being only marginal improvements. To shake that image they probably need more than a 20% change in price/performance. With all the overhead of introducing a phone that goes beyond chip design, they could do a marginal 7+ update and put more eggs into the 5N basket to look more exciting.
