Not only is Synopsys the #1 EDA/IP company, Intel is their #1 customer and TSMC is their #1 partner so I always read the transcripts for foundry data.
Sassine Ghazi - President and CEO: Since becoming Synopsys CEO in January, I've traveled to eight countries, participating in more than 140 meetings with over 80 customers and partners, discussing their challenges and understanding their priorities.
We continued to win new designs on ICV with 20 tapeouts in Q3. Four of these tapeouts were on TSMC N3 and one on IFS 18A, where engagements are increasing rapidly.
Fusion Compiler delivered the world's first mobile SOC tapeout on Samsung's 2-nanometer GAA process this quarter along with a number of customer-first tapeouts at TSMC N2, N3E, and N5.
In EDA, 3DIC compiler momentum continued with the tape out of multi-die design for an automotive application based on a CoWoS-R interposer and deployment at a major US hyperscaler. We also announced Intel Foundry EMIB, a reference flow for multi-die enabled by 3DIC compiler to accelerate multi-die designs at all stages from silicon to systems. As the on-ramp for the world's foundry, we achieved silicon success on Samsung's SF2 and SF4X processes for a range of interface IP. We also demonstrated the industry's first HBM3 operating at 9.6 gigabits per second in TSMC's advanced 3-nanometer processes.
Q: And, one of your large leading edge customers has recently announced a significant amount of layoffs across the organization. They did also talk about driving better efficiencies around IP and EDA solutions. I interpreted this as they're going to do less of their own internal IP development, less of their own internal EDA software tool development, and potentially buy more merchant IP and more core EDA tools from Synopsys and maybe some of your other competitors. But I wanted to get your interpretation of this announcement and the near to midterm impact if any on your bookings, revenues, or market share momentum at this customer.
As far as our customer, Intel, that you're referring to, it's nothing new to Intel, by the way, that they started looking at external EDA and IP. That journey started in 2007. As you recall, most of their EDA were internally developed and IP. And it's been a journey over the last number of years to transition externally.
Sassine is a Silicon Valley insider and VERY familiar with Intel and TSMC's top customers so he is definitely worth listening to. From what I understand the 18A and Samsung 2nm tapeouts were internal products.
Sassine Ghazi - President and CEO: Since becoming Synopsys CEO in January, I've traveled to eight countries, participating in more than 140 meetings with over 80 customers and partners, discussing their challenges and understanding their priorities.
We continued to win new designs on ICV with 20 tapeouts in Q3. Four of these tapeouts were on TSMC N3 and one on IFS 18A, where engagements are increasing rapidly.
Fusion Compiler delivered the world's first mobile SOC tapeout on Samsung's 2-nanometer GAA process this quarter along with a number of customer-first tapeouts at TSMC N2, N3E, and N5.
In EDA, 3DIC compiler momentum continued with the tape out of multi-die design for an automotive application based on a CoWoS-R interposer and deployment at a major US hyperscaler. We also announced Intel Foundry EMIB, a reference flow for multi-die enabled by 3DIC compiler to accelerate multi-die designs at all stages from silicon to systems. As the on-ramp for the world's foundry, we achieved silicon success on Samsung's SF2 and SF4X processes for a range of interface IP. We also demonstrated the industry's first HBM3 operating at 9.6 gigabits per second in TSMC's advanced 3-nanometer processes.
Q: And, one of your large leading edge customers has recently announced a significant amount of layoffs across the organization. They did also talk about driving better efficiencies around IP and EDA solutions. I interpreted this as they're going to do less of their own internal IP development, less of their own internal EDA software tool development, and potentially buy more merchant IP and more core EDA tools from Synopsys and maybe some of your other competitors. But I wanted to get your interpretation of this announcement and the near to midterm impact if any on your bookings, revenues, or market share momentum at this customer.
As far as our customer, Intel, that you're referring to, it's nothing new to Intel, by the way, that they started looking at external EDA and IP. That journey started in 2007. As you recall, most of their EDA were internally developed and IP. And it's been a journey over the last number of years to transition externally.
Sassine is a Silicon Valley insider and VERY familiar with Intel and TSMC's top customers so he is definitely worth listening to. From what I understand the 18A and Samsung 2nm tapeouts were internal products.