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SMIC N+3 Confirmed: Kirin 9030 Analysis Reveals How Close SMIC Is to 5nm

But M2 pitch only slightly reduce from 7nm node of 40nm to 38nm, not as intensive as M0 pitch scaled. Wonder why?
Actually TSMC N7 to N5 M2 pitch shrink (40 nm to 35 nm) wasn't enough by itself to justify a node change. Gate pitch shrink was also significant for transistor density. You might say, SMIC lagged in gate pitch too much from N+2. Yet, the patterning for gate pitch won't change, so that is not the obstacle.
 
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