I will be moderating a panel after lunch. It would be great to see you!
Seventeen years in business and a Founding Premier member of RISC-V International, Andes Technology is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.
By bringing the leading companies in the RISC-V ecosystem together at RISC-V CON, Andes aims to boost RISC-V adoption by collaborating with partners and customers to quickly bring innovative designs based on the open RISC-V ISA to market.
Charlie Su, President & CTO, Andes Technology
It is no secret that RISC-V architecture is growing, its membership is rising, and the RISC-V ecosystem is flourishing. All in an unprecedented speed. In this talk, we will examine an expanding range of applications RISC-V serves and how Andes RISC-V solutions help driving its fast adoptions. We will also look into what are coming on the horizon.
10:25 - 10:50
Bob Brennan, Vice President, Intel Foundry Services
10:50 - 11:05
Gary Spittle, Founder & CEO, Sonical
11:30 - 11:55
John Min, Director of Solution Engineering, Andes Technology
Andes is expanding RISC-V application space with ASIL Certified Cores. We will introduce industry's first ASIL Certified RISC-V Solution for Automotive Applications.
11:55 - 13:00
Moderator: Daniel Nenni, Founder, SemiWiki
Panelist: Andes, Crypto Quantique, Green Hills Software, IAR Systems, Imperas Software
13:45 - 14:10
Manny Wright, Senior Consulting Engineer, Imperas Software
This talk will outline the architectural exploration process to optimize Andes ACE extensions for your applications using the Imperas reference models and analysis tools.
14:10 - 14:35
Vijay Krishnan,General Manager, RISC-V Ventures of Intel
14:35 - 14:50
Max Hinson, Lead Technical Marketing Engineer, Green Hills Software
Green Hills Software and Andes Technology offer combined capabilities for the AndeStar™ V5 Architecture, enabling the efficient development and confident deployment of RISC-V-based designs in systems with critical requirements for functional safety and security. Green Hills’ software offering features real-time operating systems, powerful compilers and advanced C/C++ development tools that draw upon the company’s 40-years of microprocessor experience.
15:15 - 15:40
Chris Jones, IoT Director of Applications, Crypto Quantique
Cybersecurity is fast becoming the number one concern for the entire supply chain, from designers to consumers. Learn how Crypto Quantique’s Quantum driven unforgeable device ID in silicon (QDID) adds the highest level of security to an Andes RISC-V CPU's internal security features for an Internet of Things chip design.
15:40 - 16:05
Warren Chen, Senior Technical Manger, Andes Technology
16:05 - 16:30
DATE: OCTOBER 18TH, 2022 (TUESDAY)
TIME: 10:00 AM - 6:00 PM
VENUE: DOUBLETREE BY HILTON HOTEL SAN JOSE
In order to foster stronger collaboration on RISC-V across the computing industry, RISC-V CON focuses on this disruptive technology, demonstrating its benefits and identifying commercial strategies. Through RISC-V CON, the RISC-V community and ecosystem can share the most up-to-date development and RISC-V based products and solutions.Seventeen years in business and a Founding Premier member of RISC-V International, Andes Technology is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.
By bringing the leading companies in the RISC-V ecosystem together at RISC-V CON, Andes aims to boost RISC-V adoption by collaborating with partners and customers to quickly bring innovative designs based on the open RISC-V ISA to market.
AGENDA
09:30 - 10:00REGISTRATION
10:00 - 10:25EXPANDING THE RISC-V HORIZON
Charlie Su, President & CTO, Andes Technology
It is no secret that RISC-V architecture is growing, its membership is rising, and the RISC-V ecosystem is flourishing. All in an unprecedented speed. In this talk, we will examine an expanding range of applications RISC-V serves and how Andes RISC-V solutions help driving its fast adoptions. We will also look into what are coming on the horizon.
10:25 - 10:50
RISC-V IN A NEW SYSTEMS FOUNDRY ERA
Bob Brennan, Vice President, Intel Foundry Services
10:50 - 11:05
TEA BREAK
11:05 - 11:30EAR COMPUTERS - THE FOUNDATION OF HEADPHONE 3.0
Gary Spittle, Founder & CEO, Sonical
11:30 - 11:55
ANDES IS DRIVING ON
John Min, Director of Solution Engineering, Andes Technology
Andes is expanding RISC-V application space with ASIL Certified Cores. We will introduce industry's first ASIL Certified RISC-V Solution for Automotive Applications.
11:55 - 13:00
LUNCH
13:00 - 13:45RISC-V ECOSYSTEM PANEL: FROM EDGE TO CLOUD
Moderator: Daniel Nenni, Founder, SemiWiki
Panelist: Andes, Crypto Quantique, Green Hills Software, IAR Systems, Imperas Software
13:45 - 14:10
ARCHITECTURAL EXPLORATION FOR RISC-V OPTIMIZED DOMAIN SPECIFIC PROCESSORS WITH IMPERAS AND ANDES ACE
Manny Wright, Senior Consulting Engineer, Imperas Software
This talk will outline the architectural exploration process to optimize Andes ACE extensions for your applications using the Imperas reference models and analysis tools.
14:10 - 14:35
ENABLING RISC-V FOR AIOT & EDGE
Vijay Krishnan,General Manager, RISC-V Ventures of Intel
14:35 - 14:50
TEA BREAK
14:50 - 15:15SAFE AND SECURE SOFTWARE SOLUTIONS FOR ANDES RISC-V
Max Hinson, Lead Technical Marketing Engineer, Green Hills Software
Green Hills Software and Andes Technology offer combined capabilities for the AndeStar™ V5 Architecture, enabling the efficient development and confident deployment of RISC-V-based designs in systems with critical requirements for functional safety and security. Green Hills’ software offering features real-time operating systems, powerful compilers and advanced C/C++ development tools that draw upon the company’s 40-years of microprocessor experience.
15:15 - 15:40
SECURING YOUR RISC-V DESIGN END TO END USING QUANTUM DRIVEN TECHNOLOGY
Chris Jones, IoT Director of Applications, Crypto Quantique
Cybersecurity is fast becoming the number one concern for the entire supply chain, from designers to consumers. Learn how Crypto Quantique’s Quantum driven unforgeable device ID in silicon (QDID) adds the highest level of security to an Andes RISC-V CPU's internal security features for an Internet of Things chip design.
15:40 - 16:05
UNLEASHING RISC-V COMPUTING POWER IN AIOT AND DOMAIN-SPECIFIC APPLICATIONS
Warren Chen, Senior Technical Manger, Andes Technology
16:05 - 16:30