More than Moore - IBM Announces 0.7nm Process Node (Significant logic/SRAM scaling vs 2nm)

[Xebec]

IBM’s Announces 0.7nm Process Node, Introduces NanoStack

666 Million Transistors Per Square Millimeter

morethanmoore.substack.com

A great article from Ian Cuttress -- partial take-aways to not spoil the full article:

- "When it comes to IBM, I firmly believe they’re in the camp of saying Moore’s Law is still alive."
- There are multiple types of CFET design in the literature, and specifically IBM has built a staggered sequential CFET design
- [Compared to IBM's 2nm - 40% SRAM scaling, 50% Logic scaling, more info in article]
- IBM is getting a High-NA machine..

The article also contrasts the major chip foundries approaches to future transistor types with what IBM is doing/planning, using plenty of charts and diagrams.

 

[IanD]

The really interesting bit is not just the PMOS/NMOS staggering but the fact that the NMOS and PMOS are on separately processed wafers which are cut on different crystal planes (<110> for PMOS, <001> for NMOS) to optimise the performance of each.

The key to all this is the new (proprietary?) "device-scale" wafer bonding process which IBM claim to have got working -- how this transfers to mass production remains to be seen, presumably any foundry which wanted to adopt the process will have to license this, and the differently-cut wafers, and the staggering.

All put together this offers some pretty compelling advantages, so it'll be interesting to see what the foundries (especially TSMC) do, adopt/license the IBM approach or try and come up with something of their own with similar advantages...

 

[MKWVentures]

This is interesting research. I congratulate my friends at IBM for research and their leadership

But IBM does not manufacture semiconductors for itself or anyone else. Correct?

IBM 2nm was "announced" over 5 years ago and it is still 2+ years from anyone (Rapidus) using it in a real product that people buy.

So its an idea for conference attendees to discuss (Like university papers). It would seem it is unlikely to ever impact what actually happens in the industry

great comprehenive article by Ian...... I wish my brain could create, hold, and summarize that much information. Well done.

 

[IanD]

This is interesting research. I congratulate my friends at IBM for research and their leadership

But IBM does not manufacture semiconductors for itself or anyone else. Correct?

IBM 2nm was "announced" over 5 years ago and it is still 2+ years from anyone (Rapidus) using it in a real product that people buy.

So its an idea for conference attendees to discuss (Like university papers). It would seem it is unlikely to ever impact what actually happens in the industry

great comprehenive article by Ian...... I wish my brain could create, hold, and summarize that much information. Well done.

Didn't IBM do nanosheets before anyone else? And everyone has adopted them now... ;-)

 

[MKWVentures]

Didn't IBM do nanosheets before anyone else? And everyone has adopted them now... ;-)

If you talk to IBM people, yes.

... and they invented wafers, GPUs, CMOS, cellphones, grand theft auto,..... and wait for it ..... the question mark.

 

[IanD]

If you talk to IBM people, yes.

... and they invented wafers, GPUs, CMOS, cellphones, grand theft auto,..... and wait for it ..... the question mark.

Surely the point about IBM is that they're great at coming up with radical new technologies, but not necessarily ones that can easily be turned into a real high-yield cost-competitive mass-production process (directly or via licensing)?

This has happened in the the past with foundries who tried to do this and came unstuck (e.g. Samsung? STM?), maybe because IBM don't think hard enough about production/alignment margins -- so long as they get one working lot and can publish a paper about it (and license it?) that's their job done.

Still doesn't mean they didn't do it first (and deserve credit for that), or that it won't end up being widely adopted -- but often the foundry that succeeds is one that builds on the fundamental IBM idea but then does it better for mass production (e.g. TSMC...)

There are several major new ideas here which together give a pretty big PPA advantage, the question is whether they'll make it to MP (and when) and in which foundry.

 

[SteveD]

The really interesting bit is not just the PMOS/NMOS staggering but the fact that the NMOS and PMOS are on separately processed wafers which are cut on different crystal planes (<110> for PMOS, <001> for NMOS) to optimise the performance of each.

The key to all this is the new (proprietary?) "device-scale" wafer bonding process which IBM claim to have got working -- how this transfers to mass production remains to be seen, presumably any foundry which wanted to adopt the process will have to license this, and the differently-cut wafers, and the staggering.

All put together this offers some pretty compelling advantages, so it'll be interesting to see what the foundries (especially TSMC) do, adopt/license the IBM approach or try and come up with something of their own with similar advantages...

One of these IBM news releases is generating a lot of confusion. AFAIK, no one is able to bond two device wafers, one with PMOS and one with NMOS transistors, to generate a CFET at a 0.7nm-node pitch. The bond pitch would have to be < 50nm, which is not feasible.

Rather, what they are doing is to start with a device wafer (say, PMOS), then bond to it an unpatterned crystalline silicon film from a donor wafer (with a suitable bonding interface), and continue patterning this film to create the second device. This is what's called the "sequential CFET" process.

 

[MKWVentures]

Surely the point about IBM is that they're great at coming up with radical new technologies, but not necessarily ones that can easily be turned into a real high-yield cost-competitive mass-production process (directly or via licensing)?

This has happened in the the past with foundries who tried to do this and came unstuck (e.g. Samsung? STM?), maybe because IBM don't think hard enough about production/alignment margins -- so long as they get one working lot and can publish a paper about it (and license it?) that's their job done.

Still doesn't mean they didn't do it first (and deserve credit for that), or that it won't end up being widely adopted -- but often the foundry that succeeds is one that builds on the fundamental IBM idea but then does it better for mass production (e.g. TSMC...)

There are several major new ideas here which together give a pretty big PPA advantage, the question is whether they'll make it to MP (and when) and in which foundry.

As you mentioned, It is well known that transfering a technology from IBM leads to severe problems. Intel also has a history of leading edge, high cost, unmanufacturable technologies.

As far are people using IBMs ideas, yes manufacturing companies look at all the research data from universities, IMEC, IBM, etc. I dont know of any technology in the last 15 years where a semicompany used IBM as a major input. They did invent the CMP technology we used in 1993.... But not Finfet, GAA, strained silicon,.... they did get a bunch of people to use Gate first HKMG LOL

But if people want to say IBM invented 2nm GAA because they did a ton of presentations, that is fine. We can talk if it is used in products that we can all buy someday.

 

[hist78]

Surely the point about IBM is that they're great at coming up with radical new technologies, but not necessarily ones that can easily be turned into a real high-yield cost-competitive mass-production process (directly or via licensing)?

This has happened in the the past with foundries who tried to do this and came unstuck (e.g. Samsung? STM?), maybe because IBM don't think hard enough about production/alignment margins -- so long as they get one working lot and can publish a paper about it (and license it?) that's their job done.

Still doesn't mean they didn't do it first (and deserve credit for that), or that it won't end up being widely adopted -- but often the foundry that succeeds is one that builds on the fundamental IBM idea but then does it better for mass production (e.g. TSMC...)

There are several major new ideas here which together give a pretty big PPA advantage, the question is whether they'll make it to MP (and when) and in which foundry.

If you talk to IBM people, yes.

... and they invented wafers, GPUs, CMOS, cellphones, grand theft auto,..... and wait for it ..... the question mark.

IBM Semiconductor Technology Research (STR) is part of IBM Research and is in an awkward position. After IBM paid $1.5 billion to have GlobalFoundries take over its semiconductor manufacturing division in 2015, IBM became a semiconductor company that has labs but no fabs. IBM no longer has its own commercial fabs to test or co‑develop manufacturing technologies, let alone support high volume production.

Compared with the not‑for‑profit structures of IMEC in Belgium and ITRI in Taiwan, IBM STR operates under a for‑profit corporate umbrella and must keep producing leading edge, high visibility breakthroughs to justify its existence and attract new funding sources. This is challenging because there are only four leading edge semiconductor manufacturers in the world (excluding mainland China): three established incumbents - TSMC, Intel, and Samsung - and one potential newcomer, Japan’s Rapidus. Rapidus is the only company licensed to use IBM’s 2nm technology. TSMC, Samsung, and Intel all appear uninterested in adopting or paying for IBM’s technologies.

GlobalFoundries exited leading edge logic manufacturing in 2018. Worse, the deteriorating relationship between IBM and GlobalFoundries eventually led to lawsuits accusing each other of contract breaches or trade secret misappropriation. They finally settled these disputes in January 2025.

As leading edge semiconductor research and manufacturing become extremely expensive and complex, it is unclear how long the current business model and organizational scale of IBM Semiconductor Technology Research can remain sustainable.

 

[MKWVentures]

IBM Semiconductor Technology Research (STR) is part of IBM Research and is in an awkward position. After IBM paid $1.5 billion to have GlobalFoundries take over its semiconductor manufacturing division in 2015, IBM became a semiconductor company that has labs but no fabs. IBM no longer has its own commercial fabs to test or co‑develop manufacturing technologies, let alone support high volume production.


As leading edge semiconductor research and manufacturing become extremely expensive and complex, it is unclear how long the current business model and organizational scale of IBM Semiconductor Technology Research can remain sustainable.

Since you mentiioned financials

1) IBM does its research lab acvitivies at Albany nanotech, correct? which is owned by the state and leased space to IBM? IBM does not own it?
2) tool are provided by other partners there for research, Does the state own those tools or does ASML etc.
3) Does IBM get paid to be there or pay to use the site? does Intel or Micron or samsung use this site?

Who pays IBM for IBM process research? not GF or Intel..... Do they have any partners other than Rapidus? or is it just government grants

thanks!

 

[IanD]

One of these IBM news releases is generating a lot of confusion. AFAIK, no one is able to bond two device wafers, one with PMOS and one with NMOS transistors, to generate a CFET at a 0.7nm-node pitch. The bond pitch would have to be < 50nm, which is not feasible.

Rather, what they are doing is to start with a device wafer (say, PMOS), then bond to it an unpatterned crystalline silicon film from a donor wafer (with a suitable bonding interface), and continue patterning this film to create the second device. This is what's called the "sequential CFET" process.

That doesn't seem to be what is described, unless I'm missing something -- otherwise you'd hit the usual thermal process budget problems with stacked devices, which they specifically say they avoid...