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Intel Foundry, losing key people in 2025-2026

the SIMD is mostly don't getting used for AI it's the Matmul hardware or the tensor core part that is getting used. TPU is just a large matmul accelerator (gross simplification)
You're correct that Blackwells, for example, aren't the (relatively!) simple systolic arrays that GPUs used to be, but SIMD is used actually or conceptually (single instruction stream on multiple threads) in various execution units and dataflows in the chips. I will argue that Nvidia's experience with SIMD concepts and implementations has given them a leg up over companies that have never implemented and productized SIMD or SIMD-like architectures before. The same goes for AMD. And Google has seven generations of getting systolic arrays right in TPUs. I know that you know that theory is easy compared to making an implementation function reliably, with high performance and high efficiency, especially in silicon gates.
 
You're correct that Blackwells, for example, aren't the (relatively!) simple systolic arrays that GPUs used to be, but SIMD is used actually or conceptually (single instruction stream on multiple threads) in various execution units and dataflows in the chips. I will argue that Nvidia's experience with SIMD concepts and implementations has given them a leg up over companies that have never implemented and productized SIMD or SIMD-like architectures before. The same goes for AMD. And Google has seven generations of getting systolic arrays right in TPUs. I know that you know that theory is easy compared to making an implementation function reliably, with high performance and high efficiency, especially in silicon gates.
AMD has been shipping client GPUs for quite some generation so they have the experience. The issue with AMD is not hardware but software but their Hardware from only hardware point of view is very good but the software and tooling is not mature,. AMD was able to come back in CPU due to the fact that hardware was compatible with already mature X86_64 Ecosystem if somehow you can insert AMD hardware and run CUDA and stuff on it Nvidia would be in a tight spot as for your last sentence I wholeheartedly agree.
 
I'd eliminate the program management function completely, and assign the engineering leaders to get the big picture or get out.
Hate to say it because Intel is so decimated already, but you may get your wish. Another round of layoffs coming I think, kicked off by Jack Dorsey. That middle layer is red meat.
 
That might true for engineering and fab operations, but probably not for marketing, sales, product management, and program management.
I think LBT has helped on the program managers. I am ok with a program manager. having 6 for one platform.... and having chief of staff for a couple of them..... and having " assistant to the program manager" (jk) was excessive.

by all metrics Intel was overstaffed at all positions. I firmly believe Intel will deliver better, more quickly, as a result of less people.

That said, I have friends at Intel who said a year ago "we need more people, not less". I told them they were irreversably corrupted and they should go work for government LOL
 
So many but here are my top 5:

  • AI Strategy. Did Intel even have one?
As I have mentioned like a broken record, Intel was prioritizing AI accelerators in 2010 and had multiple projects working and prioritized. They made multiple acquisitions.

Somehow, the products have been incredible delayed and as a result incredibly off base on specs. Most were cancelled. I have heard horror stories on the management and execution on the projects (example: Changing product requirements document every month)

I am guessing Intel is too slow and not agile enough to deal with AI (or Mobile). LBT has made major changes to fix this..... but the employees are still there.
 
So many but here are my top 5:

Leadership Restructuring. Intel had so many layers of management.
  • AI Strategy. Did Intel even have one?

  • Focus on Engineering and Execution. One thing I can tell you about Lip-Bu is that he does not suffer fools gladly and Intel had plenty of fools.

  • Strong Foundry Strategy. I have strong ties to the foundry business and I like what I see. Prior to Lip-Bu I did not like what I say.

  • Financial Strength. One week Trump called out Lip-Bu to resign. The next week the USG made a big investment in Intel, followed by investments from Nvidia and SunSoft. I don't care what anyone says, that is a STRONG move under an incredible amount of pressure.

Personally I think Lip-Bu will go down in history as the best Intel CEO, absolutely.
Restructuring and delayering by LBT is true and a positive. TSMC has 90% less VPs and it sure didn’t seem to impact their growth or performance.
 
Hiring TSMC former Senior Vice President Wei‑Jen Lo is one example that puzzled me. Regardless of whether Mr. Lo stole any trade secrets, why did Lip‑Bu Tan allow the situation to deteriorate into civil lawsuits and criminal prosecutions? Did he forget that TSMC has been one of Intel’s most important suppliers and partners for more than 30 years? Did he not realize that TSMC’s leading edge capacity is in extremely high demand, and that many of Intel’s competitors are financially capable of taking over any capacity Intel might otherwise secure? That could easily cost Intel several billions in lost revenue, profits, and opportunities. How could Lip‑Bu Tan not be worried about this and handle the situation more like a seasoned, skillful CEO?

This is very concerning. Hopefully there is a good explanation but I cannot think of one.
 
You can add:

Chek-San (CS) Leong
· 1st Senior Director, Head of IP and Chiplet Ecosystem Alliance at Intel Foundry.

After 4.5 years, I am closing my chapter at Intel. As I prepare to move on to my next endeavor, I want to take a moment to express my sincere gratitude to all my Intel colleagues. Working alongside such talented, supportive, and inspiring individuals has been an incredibly rewarding journey. To all my ecosystem partners who have consistently supported us - thank you.
 
You can add:

Chek-San (CS) Leong
· 1st Senior Director, Head of IP and Chiplet Ecosystem Alliance at Intel Foundry.

After 4.5 years, I am closing my chapter at Intel. As I prepare to move on to my next endeavor, I want to take a moment to express my sincere gratitude to all my Intel colleagues. Working alongside such talented, supportive, and inspiring individuals has been an incredibly rewarding journey. To all my ecosystem partners who have consistently supported us - thank you.
Is this just hypocrisy? Is IFS IP alliance really there after 4.5 yrs, and how much $ spent?
 
Is this just hypocrisy? Is IFS IP alliance really there after 4.5 yrs, and how much $ spent?

It was a valiant attempt by Pat Gelsinger to follow TSMC's ecosystem but misguided. The top semiconductor companies tell EDA what foundries to support. Top semiconductor companies create most of their own IP. Intel Foundry can be in the drivers seat on this one. They are a leader not a follower.
 

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Jmem Tek Joins the Intel Foundry Accelerator Ecosystem Alliance Program, Enabling JPUF and Post-Quantum Security Designs​

2026-03-02
TAIPEI, TAIWAN & SAN JOSE, CALIFORNIA

Jmem Tek announces that it has joined the Intel Foundry Accelerator Ecosystem Alliance as a partner in the IP and Chiplet Alliance programs.

Through the Intel Foundry Ecosystem Alliance, Jmem Tek makes its hardware security IP portfolio available to customers designing and manufacturing products using Intel Foundry’s leading edge process technologies. The Jmem Tek portfolio includes its proprietary Physical Unclonable Function (PUF) technologies and post-quantum cryptography (PQC) implementations. These IP solutions may be integrated into customer designs to support faster development and enhanced system-level security.

“We are pleased to join the Intel Foundry Accelerator Ecosystem Alliance,” said John Chang, Founder and CEO of Jmem Tek. “The program provides an optimized way for customers to work with industry-leading ecosystem companies for advanced semiconductor development. Our partnership allows customers to consider Jmem Tek’s PUF and post-quantum security IP as part of their overall design approach to address emerging quantum security requirements such as CNSA 2.0 in the United States.”

Jmem Tek’s patented PUF technology uses inherent semiconductor process variations to generate a unique, unclonable identity for each chip without requiring secret keys to be stored in memory. The solutions support foundational security functions such as device identity, supply chain authentication, and cryptographic key generation, and are designed to align with emerging quantum-resilient security standards, including NIST post-quantum cryptography standards and hardware PUF evaluation frameworks such as ISO/IEC 20897. Availability and implementation of any IP remain subject to customer design choices and applicable agreements.

“Giving our customers access to industry-leading solutions is the foundation of the Intel Foundry Accelerator Ecosystem Alliance program, and Jmem Tek is a welcome addition to our IP and Chiplet Alliances,” said Vic Vadi, Vice President, Ecosystem Technology Office and Business Line General Manager for the Intel 14A family at Intel Foundry. “Looking ahead to the quantum era, hardware-rooted security is becoming a key consideration for advanced semiconductor designs. PUF-based security technologies, such as those developed by Jmem Tek, represent an important class of IP for customers seeking to establish long-term device trust and cryptographic resilience on leading-edge processes.”

The Intel Foundry Ecosystem Alliance program brings together ecosystem domain leaders to equip its customers with industry-leading electronic design automation tools, IP, project acceleration and augmentation services, and design implementation environments to meet their unique needs, as well as to drive interoperable and secure chiplet implementations. Jmem Tek’s participation reflects its ongoing commitment to hardware-based security technologies supporting advanced semiconductor applications in the quantum era.

About Jmem Tek:

Jmem Tek is a provider of hardware-based security intellectual property for advanced semiconductor applications. The company specializes in proprietary Physical Unclonable Function (PUF)–based technologies, hardware-rooted identity architectures, and post-quantum cryptography (PQC) solutions designed to enable secure device identity, cryptographic key generation, and silicon-level root of trust.

Jmem Tek’s security IP portfolio is designed for integration across a broad range of process technologies and end markets, including data center, edge computing, automotive, and government-oriented systems. Its technologies are developed to align with evolving global security standards and emerging quantum-resilient frameworks, supporting secure-by-design semiconductor architectures.

Headquartered in Taiwan with expansionary operations in the United States, Jmem Tek is a portfolio company of Silicon Catalyst – the world’s only accelerator exclusively focused on semiconductor solutions. Silicon Catalyst collaborates with in-kind partners and investors across the global semiconductor value chain. Through the Silicon Catalyst ecosystem, Jmem Tek works with customers worldwide to advance hardware-based security innovation and support long-term trust in advanced semiconductor products.

For further information, please contact marketing@jmemtek.com
 
As I have mentioned like a broken record, Intel was prioritizing AI accelerators in 2010 and had multiple projects working and prioritized. They made multiple acquisitions.
In 2010? There's no public record of any acquisitions relating to AI in that timeframe. The only ones I can think of were later, after 2015. Nervana and Habana were 2016 and 2019. I'm not counting any of the self-driving stuff (like Mobileye), because that's tangential to AI. What are the internal projects you're thinking of?
 
It was a valiant attempt by Pat Gelsinger to follow TSMC's ecosystem but misguided. The top semiconductor companies tell EDA what foundries to support. Top semiconductor companies create most of their own IP. Intel Foundry can be in the drivers seat on this one. They are a leader not a follower.
agree internal design capability is Intel's key asymmetrical advantage over tsmc. Whether intel can leverage it, unfortunately, is very much yet to be seen. They are obviously reshuffling the management, as evidenced by the list of people mentioned above who joined and left. Perhaps we will get better picture in 6-9 months
 
In 2010? There's no public record of any acquisitions relating to AI in that timeframe. The only ones I can think of were later, after 2015. Nervana and Habana were 2016 and 2019. I'm not counting any of the self-driving stuff (like Mobileye), because that's tangential to AI. What are the internal projects you're thinking of?
Old comment "As I have mentioned like a broken record, Intel was prioritizing AI accelerators in 2010 and had multiple projects working and prioritized. They made multiple acquisitions."

Sorry, to rephrase: As I have mentioned like a broken record, Intel was prioritizing AI accelerators in 2010. Intel has had multiple projects working and prioritized since then. They made multiple acquisitions since then. "
 
I think there has been a proliferation of program managers, TPMs, and product mangers at really all tech companies over the last decade, to the point where a lot of companies have more people with manager in the job title than engineer. It's not that these positions don't have any value at all, and I will say that a good TPM or program manager is worth there weight in gold... but you don't need very many of them.
 
The current radical proposal is from Taalas, who are fabricating a custom chip for a given model using structured ASIC / gate array technology. No programmability. EEtimes published this article; TheNextPlatform also did one, posted by IanD.

https://www.eetimes.com/taalas-specializes-to-extremes-for-extraordinary-token-speed/
My impression is that models change too often for this approach, but I'm sure these guys have convincing evidence of practicality, since they've raised $200M (he says with a hint of sarcasm).

This part of the Taalas messaging is most interesting.

"Model-optimal silicon, as Kharya calls it, is inevitable, he said. While it won’t replace big data centers full of GPUs, it will suit some applications, particularly as models mature enough to become useful, as it makes them stickier."

It's interesting because Taalas actually have a web-based chat agent that lets you see the speed of the smallish LLAMA 8B model here:


But the access also reveals how "dumb" and non-specific a stateless, raw model is - it's conversational, but gets a lot wrong without knowing it. Reminds one how different models are from the entire LLM environment built for gigs real answers. One example.
 

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