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imec CFET Progress

hskuo

Well-known member
Interesting to see imec's CFET STEM pictures. Just wondering: will we see transistor aging like "herniated disc" in the future? Just for fun.
Source: https://www.imec-int.com/en/press/i...-cfet-devices-stacked-bottom-and-top-contacts

1729553847965.png
 
significantly improving top device survival rate from 11% to 79%.

That's very early development, but it's interesting why doing bottom contact as TSV was so beneficial.
 
Aging is a serious problem. We covered the recent Intel aging problem here:

 
That's very early development, but it's interesting why doing bottom contact as TSV was so beneficial.
Maybe I am not creative enough, but if you are doing the BCN fully from the FS of the wafer, I assume the flow goes something like: CFET FEOL -> finish bottom device FEOL -> bottom device MEOL -> finish top device FEOL -> top device MEOL. If you do the BCN from the BS you can do: complete FEOL -> top device MEOL -> FS-BEOL -> bond/grind/flip -> bottom device MEOL. Being able to do the FEOL all at once and only do the contacts after just makes things easier to process, less contamination/etch residues screwing with your top device, more space to work with without having shorting and the like, etc. Device is not my speciality but it might also help with thermal budget related concerns if the FEOL is all done together without having to put in a contact first.

Now, maybe by "making the BCN from the FEOL" they were talking about putting in a sacrificial plug from the FS and then eating that out from the BS and filling with metal. Which also has many of the same issues as the above, but it does sound much easier than what I described above. Using a plug to self align the contact is how I would do a FS-BCN at least. Either way, just direct printing that bad boy from the back should be easier for the FS processing and I would assume it is easier to not have TCN-BCN shorts (assuming you have good depth control via an etch stop or something). Speaking of a full BS contact process might give you better across die uniformity and by extension lower etch loading and better film depositions. I'm not a litho guy, but my understanding is better uniformity also makes alignment/EPE better.
 
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