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Hybrid Memory Cube Performance: PhD Thesis Published

MHC is great, SerDes based! High Bandwith Memory is parallel based, but supported by JEDEC.
Both technologies are 3D (expensive)
What about the power efficiency?
It would be very useful to get access to a deep technical survey, comparing (in situ) bandwidth and power efficiency for HMC and HBM... it may be that two expensives DRAM controller protocols means that one will disappear?
 
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