August 19, 2025
Intel Foundry is at the forefront of revolutionizing system-on-chip designs into system-of-chips architectures. This video explores the future of multi-chip compute, pushing beyond traditional reticle limits. With cutting-edge Intel 18A-PT and Intel 14A process node technologies, discover how our advanced packaging solutions seamlessly integrate to achieve scaling more than 12 times the reticle size. Watch how Intel Foundry combines its innovative technologies in this brief video.
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To meet the growing demands of AI, here’s a quick look at our packaging innovations, as presented at the 2025 IEEE Electronic Components and Technology Conference.
Up for a deeper dive? We disclosed several chip packaging breakthroughs at the Electronic Components Technology Conference (ECTC), outlining the technical merits of multiple new chip packaging techniques. Paul Alcorn, Tom’s Hardware’s editor in chief spoke to Rahul Manepalli, Intel Fellow and vice president of substrate packaging development to discuss EMIB-T, for boosting both the size of chip packages and power delivery capabilities to support new technologies like HBM4/4e, a new disaggregated heat spreader design, and a new thermal bonding technique that improves reliability, yields, and enables scaling to finer chip-to-chip connections. For more details, follow the link to the article below.
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We are enhancing our cutting-edge EMIB technology by integrating Through-Silicon Vias (TSVs), further solidifying its bridge technology leadership in the industry. The new EMIB-T innovation offers vertical power delivery to efficiently support High Bandwidth Memory (HBM). Customers now have the flexibility to select between EMIB-M, featuring Metal-Insulator-Metal (MIM) capacitors, or EMIB-T, depending on their specific design requirements. Our comprehensive portfolio of advanced packaging solutions, coupled with expert design services, facilitates seamless design conversion from alternative packaging technologies. Discover more by exploring our EMIB Technology brief.
Read the brief
To meet the intricate demands of our customers, Foveros 2.5D now delivers solutions featuring silicon interposers, redistribution layers (RDL), and bridges. This sophisticated packaging technology has been a cornerstone of Intel Foundry's offerings since 2019, with Foveros-S pioneering advanced die stacking through the use of a silicon interposer. Set to be production-ready in 2026, Foveros-R and Foveros-B introduce RDLs and silicon bridges, offering versatile options to accommodate any design requirement. Learn more about their applications with our Foveros Technology brief.
Read the brief
Watch Kevin O'Buckley, SVP & GM of Foundry Services at Intel Corporation, discuss the future of foundry innovation on the Semiconductors track at the Six Five Summit. He explores how Intel Foundry is advancing chiplet-based design, packaging, and heterogeneous integration to meet the demands of AI and high-performance computing. Kevin highlights the importance of backside power and gate-all-around technologies, and how Intel Foundry is embracing ecosystem collaboration to drive the next era of semiconductor leadership.
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September
October
November
Intel Foundry is at the forefront of revolutionizing system-on-chip designs into system-of-chips architectures. This video explores the future of multi-chip compute, pushing beyond traditional reticle limits. With cutting-edge Intel 18A-PT and Intel 14A process node technologies, discover how our advanced packaging solutions seamlessly integrate to achieve scaling more than 12 times the reticle size. Watch how Intel Foundry combines its innovative technologies in this brief video.
Watch the video
Fast facts on our advanced packaging offerings
AI is pushing the limits of chipmaking – literally, the physical area of silicon that can be manufactured. Intel Foundry is developing the future of advanced packaging technologies that will enable customers to achieve new levels of performance.To meet the growing demands of AI, here’s a quick look at our packaging innovations, as presented at the 2025 IEEE Electronic Components and Technology Conference.
Tom's Hardware: 3 advanced packaging breakthroughs from ECTC on the horizon
Up for a deeper dive? We disclosed several chip packaging breakthroughs at the Electronic Components Technology Conference (ECTC), outlining the technical merits of multiple new chip packaging techniques. Paul Alcorn, Tom’s Hardware’s editor in chief spoke to Rahul Manepalli, Intel Fellow and vice president of substrate packaging development to discuss EMIB-T, for boosting both the size of chip packages and power delivery capabilities to support new technologies like HBM4/4e, a new disaggregated heat spreader design, and a new thermal bonding technique that improves reliability, yields, and enables scaling to finer chip-to-chip connections. For more details, follow the link to the article below.
Read the article
TSV options now available on Embedded Multi-die Interconnect Bridge (EMIB) architecture
We are enhancing our cutting-edge EMIB technology by integrating Through-Silicon Vias (TSVs), further solidifying its bridge technology leadership in the industry. The new EMIB-T innovation offers vertical power delivery to efficiently support High Bandwidth Memory (HBM). Customers now have the flexibility to select between EMIB-M, featuring Metal-Insulator-Metal (MIM) capacitors, or EMIB-T, depending on their specific design requirements. Our comprehensive portfolio of advanced packaging solutions, coupled with expert design services, facilitates seamless design conversion from alternative packaging technologies. Discover more by exploring our EMIB Technology brief.
Read the brief
Foveros portfolio expansion provides new options to customers
To meet the intricate demands of our customers, Foveros 2.5D now delivers solutions featuring silicon interposers, redistribution layers (RDL), and bridges. This sophisticated packaging technology has been a cornerstone of Intel Foundry's offerings since 2019, with Foveros-S pioneering advanced die stacking through the use of a silicon interposer. Set to be production-ready in 2026, Foveros-R and Foveros-B introduce RDLs and silicon bridges, offering versatile options to accommodate any design requirement. Learn more about their applications with our Foveros Technology brief.
Read the brief
Kevin O’Buckley at Six Five Summit
Watch Kevin O'Buckley, SVP & GM of Foundry Services at Intel Corporation, discuss the future of foundry innovation on the Semiconductors track at the Six Five Summit. He explores how Intel Foundry is advancing chiplet-based design, packaging, and heterogeneous integration to meet the demands of AI and high-performance computing. Kevin highlights the importance of backside power and gate-all-around technologies, and how Intel Foundry is embracing ecosystem collaboration to drive the next era of semiconductor leadership.
Watch the video
Where to find Intel Foundry
Over the next few months, please look for Intel Foundry leaders and technologists at the following events to connect with in person.September
- ITC - 9/21-26, San Diego, CA
- ISES China - 9/22-23, Shanghai, China
- GSA US Executive Forum - 9/23, Menlo Park, CA
- IMAPS Symposium - 9/29-10/2, San Diego, CA
October
- GSA WLI WISH Conference - 10/1, San Jose, CA
- SEMICON West - 10/7-9, Phoenix, AZ
November
- International Trade Partners Conference - 11/2-5, Maui, HI
- GSA APAC Executive Forum - 11/5, Taipei, Taiwan
- SC'25 - 11/16-21, St. Louis, MO
- SIA Awards Dinner - 11/20, San Jose, CA