Japan's Jim Hamajima says lack of shared standards is hindering capacity expansion
As the industry struggles to keep packing more power into smaller chips, equipment and materials suppliers would have an easier time coming up with unique solutions if the supply chain wasn't so "balkanized," the president of the Japan office of SEMI says. (Photo courtesy of SEMI Japan)
TOKYO -- The chip industry needs more international standards for back-end, or latter-stage, production processes to enable companies like Intel and Taiwan Semiconductor Manufacturing Co. to increase capacity more efficiently.
That is according to Jim Hamajima, president of the Japan office of SEMI, an international semiconductor industry group.
"Companies are trying unique solutions in the back-end process," Hamajima told Nikkei Asia. "TSMC, Intel, they all use different [standards]. I can't even remember their names. This is not efficient."
Back-end processes, which include chip packaging and testing, are more "balkanized" than earlier stages of chipmaking, such as lithography, in which standards set by SEMI are widely used, Hamajima said. This, he argues, could affect profit levels in the industry as companies pursue ever more powerful chips.
Standardizing automation or material specifications, he argues, would "make things easier for equipment and material suppliers, allowing the industry to compete in other meaningful areas."
Chip packaging in particular has become increasingly important for achieving breakthroughs in chip technology because the traditional approach -- squeezing more transistors onto one chip -- is facing technological limitations. This has spurred massive amounts of investment in R&D and commercial capacity, but more will be needed. TSMC's CoWoS packaging technology, for example, is considered essential for cutting-edge AI chips, but the company is struggling to increase capacity fast enough to keep up with demand, the company recently warned.
In addition to his role at SEMI, Hamajima is a director of a recently launched consortium led by Intel and 14 Japanese companies to research automation systems for back-end processes. Japanese suppliers have a high market share in automation equipment and materials, making the country a convenient place to test new standards.
"It is only natural that companies, from their competitive nature, would want to try to make [their own process] the de facto standard," Hamajima said. He also acknowledged the risk of standards being developed in a way favorable to Intel, as the American company is the only global chip manufacturer in the consortium. But he stressed that there is still time for more chipmakers to join the group, and the consortium's research would only serve as a "draft" to be further discussed within the industry.
The SEMI Japan head also addressed Japan's labor shortage, saying there was no sign of the problem improving amid a rush of investment from the likes of TSMC and government-backed startup Rapidus. Many experienced engineers left the industry or sought careers overseas as the domestic industry began struggling after the 2000s.
He suggested that Japan relax its visa policy for engineers and students from India.
SEMI will hold its signature Semicon exhibition in India for the first time in September near New Delhi. Hamajima stressed that the event will be a golden opportunity to showcase Japan's potential to young talent. He added that SEMI could consider matching up small Japanese companies with Indian schools in the future, as small companies have bigger challenges searching for talent overseas.
asia.nikkei.com
As the industry struggles to keep packing more power into smaller chips, equipment and materials suppliers would have an easier time coming up with unique solutions if the supply chain wasn't so "balkanized," the president of the Japan office of SEMI says. (Photo courtesy of SEMI Japan)
TOKYO -- The chip industry needs more international standards for back-end, or latter-stage, production processes to enable companies like Intel and Taiwan Semiconductor Manufacturing Co. to increase capacity more efficiently.
That is according to Jim Hamajima, president of the Japan office of SEMI, an international semiconductor industry group.
"Companies are trying unique solutions in the back-end process," Hamajima told Nikkei Asia. "TSMC, Intel, they all use different [standards]. I can't even remember their names. This is not efficient."
Back-end processes, which include chip packaging and testing, are more "balkanized" than earlier stages of chipmaking, such as lithography, in which standards set by SEMI are widely used, Hamajima said. This, he argues, could affect profit levels in the industry as companies pursue ever more powerful chips.
Standardizing automation or material specifications, he argues, would "make things easier for equipment and material suppliers, allowing the industry to compete in other meaningful areas."
Chip packaging in particular has become increasingly important for achieving breakthroughs in chip technology because the traditional approach -- squeezing more transistors onto one chip -- is facing technological limitations. This has spurred massive amounts of investment in R&D and commercial capacity, but more will be needed. TSMC's CoWoS packaging technology, for example, is considered essential for cutting-edge AI chips, but the company is struggling to increase capacity fast enough to keep up with demand, the company recently warned.
In addition to his role at SEMI, Hamajima is a director of a recently launched consortium led by Intel and 14 Japanese companies to research automation systems for back-end processes. Japanese suppliers have a high market share in automation equipment and materials, making the country a convenient place to test new standards.
"It is only natural that companies, from their competitive nature, would want to try to make [their own process] the de facto standard," Hamajima said. He also acknowledged the risk of standards being developed in a way favorable to Intel, as the American company is the only global chip manufacturer in the consortium. But he stressed that there is still time for more chipmakers to join the group, and the consortium's research would only serve as a "draft" to be further discussed within the industry.
The SEMI Japan head also addressed Japan's labor shortage, saying there was no sign of the problem improving amid a rush of investment from the likes of TSMC and government-backed startup Rapidus. Many experienced engineers left the industry or sought careers overseas as the domestic industry began struggling after the 2000s.
He suggested that Japan relax its visa policy for engineers and students from India.
SEMI will hold its signature Semicon exhibition in India for the first time in September near New Delhi. Hamajima stressed that the event will be a golden opportunity to showcase Japan's potential to young talent. He added that SEMI could consider matching up small Japanese companies with Indian schools in the future, as small companies have bigger challenges searching for talent overseas.
Chip industry needs more unified packaging approach, SEMI says
Japan's Jim Hamajima says lack of shared standards is hindering capacity expansion
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