2025 Symposium on VLSI Technology and Circuits - “Cultivating the VLSI Garden: From Seeds of Innovation to Thriving Growth“

[AmandaK]

KYOTO, JAPAN (January 10, 2025) – The 2025 Symposium on VLSI Technology & Circuits will deliver a unique convergence of technology and circuits for the microelectronics industry to maximize the synergy across both domains. The 45th Symposium on VLSI Technology & Circuits has announced a call for papers around the theme: “Cultivating the VLSI Garden: From Seeds of Innovation to Thriving Growth.” The five-day conference program will be held at the Rihga Royal Hotel in Kyoto, Japan, from June 8-12, 2025.

The Symposium will feature advanced VLSI technology developments, innovative circuit design, and the applications they enable, such as artificial intelligence, machine learning, IoT, wearable/implantable biomedical applications, big data, cloud / edge computing, virtual reality (VR) / augmented reality (AR), robotics, and autonomous vehicles.

The deadline for paper submissions to the Symposium is January 27, 2025 at 23:59 JST. There is a new format for authors submitting papers to the 2025 Symposium – paper length has been increased from two to three pages, doubling the area available for figures so that larger font sizes can be used. Font size of the figure text must be at least 8 points. Complete details for paper submission can be found online at the Symposium website.

The Symposium on VLSI Technology & Circuits seeks papers focusing on technical innovation and advances in the following areas:

• - Advanced CMOS Platforms, Interconnect, & Backside Power Delivery Network (BSPDN) Technologies
• - Advanced Packaging, Chiplet & Heterogeneous Integration Technologies including 2.5D & 3D
• - Analog and Mixed-Signal Circuits
• - Beyond CMOS Devices & Circuits That Utilize New Physics, including Spin, Photon, & Quantum Dynamics
• - Biomedical Devices, Circuits, & Systems
• - Data Converters
• - Computing / Processing in Memory
• - Device Physics, Characterization, Modeling & Reliability
• - Devices & Accelerators for ML/DL & New Computing, including Optical & Quantum Computing
• - Digital Circuits, Hardware Security, Signal Integrity, IOs
• - DTCO & Design Enablement
• - Frequency Generation & Clocking Circuits
• - Memory Technologies, Devices, Circuits, & Architectures
• - Power Management Devices & Circuits
• - Processes & Materials for CMOS Scaling & New Devices
• - Processors & SoCs
• - Sensors, Imagers, IoT, MEMS, Display Circuits
• - Wireless / RF Devices, Circuits & Systems
• - Wireline & Optical Transceivers, Optical Interconnects & Processors

With a program that integrates technology, circuits, and systems with a range and scope unlike any other conference, the weeklong Symposium continues its reputation as one of the microelectronics industry’s premiere international conferences. In addition to the technical presentations, the Symposium program will feature plenary presentations, evening panel discussions, short courses, workshops, and a demonstration session for outstanding papers.

In addition to solicited topics, the Symposium will offer Focus Sessions on special areas of joint interest for Technology and Circuits, including:

• - Advanced CMOS Beyond 2nm: CFET, 2D Devices, BSPDN
• - Advanced Memory: 3D RAM, AI Memory, Embedded PCM
• - Circuit Design, DTCO, & Design Enablement
• - 3D Packaging & System Integration
• - Design Automation: AI for Automated Circuit Design
• - A/ML Hardware: Cloud Optics & AI

The Symposium also provides opportunities for volunteers to organize and host workshops on June 8th at the Symposium. The deadline for the workshop submission for Symposium is January 20, 2025 at 23:59 JST, with acceptance notification in January 2025.

Best Student Paper Award for the Symposium is selected based on the quality of the papers and presentations. The winning student will receive a monetary award, travel cost support, and a certificate at the 2026 Symposium. At the time of submission, the student must be enrolled as a full-time student, be the leading author and presenter of the paper, and indicate consideration for the award.

The popular in-person demonstration session is part of the Symposium program, providing participants an opportunity for in-depth interaction with authors of selected papers from both Technology and Circuits sessions.

Further Information and Official Call for Papers

Visit: http://www.vlsisymposium.org.

Sponsoring Organizations​

The Symposium on VLSI Technology & Circuits is sponsored by the Japan Society of Applied Physics, in cooperation with the Institute of Electronics, Information and Communication Engineers, and the IEEE Electron Devices Society, in cooperation with the IEEE Solid State Circuits Society.

Media Contacts​

(Japan and Asia)
Secretariat for VLSI Symposia c/o JTB Communication Design, Inc.

Tokyo, Japan

E-mail: vlsisymp@jtbcom.co.jp

(North America and EU)

BtB Integrated Marketing – Chris Burke, co-Media Relations Director
E-mail: chris.burke@btbmarketing.com

Link to Press Release