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Search results

  1. M

    Intel CEO Tan reconsidering fate of chipmaker's new manufacturing tech, CFO says

    Intel offered it heavily to any and all takers in 2021-2024. Why were there not takers? what has changed? Why is Intel still planning to have 25-30% of its silicon external in 2029 18A planned peak is in 2030. by the time any external customers ramp, 18A will be pretty mature
  2. M

    Intel Board Chair Frank D. Yeary to Retire Following Annual Meeting; Dr. Craig H. Barratt Elected as Chair

    I still think is should be unacceptable to have that name and be on the Intel board. I literally screamed when he was announced.... I thought they brought back another Intel relic from 1990s (even though I like CRB and I am an Intel relic from the 1990's)
  3. M

    Intel Ohio One Construction Timeline Update

    excellent point. and Israel is still a major fab site and malaysia and vietnam huge AT sites. There are reasons for different countries.... but not sure another state in US is needed. it was granted based on PG thinking Intel needed 8 more fabs and Ohio giving huge financial support. Its half...
  4. M

    Intel Ohio One Construction Timeline Update

    As I mentioned previously. Before Intel can need Ohio, They need to fill Fab 52 (not filled yet) and finish tool out and start to ramp Fab 62. Intel demand does not require those yet. This timeline (2030) is based on comments made on this site. IF someone signs up a design with Intel, then it...
  5. M

    Press Kit: Intel at MWC Barcelona 2026

    Love the pictures. My recollection is the XEON 6 ecore is Sierra Forrest is Intel 3 process. I heard sales were very slow/low compared to plan. It was launched almost 2 years ago I am assuming XEON 6+ is Clearwater forest which is 18A process (announced here, not launched yet and no date for...
  6. M

    Intel Foundry, losing key people in 2025-2026

    Old comment "As I have mentioned like a broken record, Intel was prioritizing AI accelerators in 2010 and had multiple projects working and prioritized. They made multiple acquisitions." Sorry, to rephrase: As I have mentioned like a broken record, Intel was prioritizing AI accelerators in...
  7. M

    Intel Foundry, losing key people in 2025-2026

    As I have mentioned like a broken record, Intel was prioritizing AI accelerators in 2010 and had multiple projects working and prioritized. They made multiple acquisitions. Somehow, the products have been incredible delayed and as a result incredibly off base on specs. Most were cancelled. I...
  8. M

    Intel Foundry, losing key people in 2025-2026

    I think LBT has helped on the program managers. I am ok with a program manager. having 6 for one platform.... and having chief of staff for a couple of them..... and having " assistant to the program manager" (jk) was excessive. by all metrics Intel was overstaffed at all positions. I firmly...
  9. M

    Samsung enlarges 1c DRAM die size, yields stuck at 60%

    I have said that the largest improvement in profits for DRAM companies in 2026 is DDR not HBM. All prices are skyrocketing. HBM is obviously important but do DDR is most of the profit.
  10. M

    Micron’s $100B megafab in NY is at risk of delay due to just 6 “concerned citizens” and their frivolous lawsuit.

    the key is clear expectations, quick review, quick decisions, no do overs. If you don;t want a fab or Datacenter in your area fine.... Other people do. If not in the US, we can build in other countries.
  11. M

    Intel Foundry, losing key people in 2025-2026

    LBT has done some amazing things on financing and culture change at Intel. But IFS execution to goals since 2021 is not good. No customers (except USG in 2030) No external revenue Spending and volume on TSMC is not decreasing (Thank goodness... its keeping Intel alive) IFS is constraining...
  12. M

    Panther Lake design rules revealed, no HD cells

    there could be any number of reasons. they need the performance The HP cell has better stability, lower error rate The layout did not show a penalty for a larger cell. using a HD cell to save 1mm2 might not be a good idea. with chiplets and dummy silicon you could end up with no penalty. I...
  13. M

    NVIDIA, TSMC and INTEL gross margin

    So Intel's IFS margins are NEGATIVE 50%. 18A is listed as a headwind to margins. Ramping 14A will hurt margins according to CFO If IFS had 50% more revenue .... at zero cost.... they would not break even. If IFS had 100% of Global foundries revenue.... at zero cost.... they would not break...
  14. M

    The Looming Taiwan Chip Disaster That Silicon Valley Has Long Ignored

    I do think TSMC will continue after 2028 with or without chinese invasion. If China invades, Semiconductor availability will not be a top 10 concern for me. TSMC customers will have more issues than Fabs. Most TSMC wafers or even packaged chips are not sent from taiwan to the US. I am not an...
  15. M

    The Looming Taiwan Chip Disaster That Silicon Valley Has Long Ignored

    People are free to buy chips from Intel Samsung or GF if they are concerned. Personally I recommend buying from Taiwan Fabs . What do Lisa Su and Jensen Huang say about the risk .
  16. M

    AMD and Meta Announce Expanded Strategic Partnership to Deploy 6 Gigawatts of AMD GPUs

    the press has decided that power is the issue and buzzword for all compute. Next we will judge datacenters by social media followers.
  17. M

    Inside Apple's Multibillion-Dollar Push to Make Chips in the U.S. | WSJ

    Countries should do what they do best. They should not do what others can do best. I still think my freshman econ teacher was correct. The tech economy was built on utilizing what the US does well and what Asia does well. BTW: Even at the exact same price/cost, Asia is currently a much...
  18. M

    Panther Lake design rules revealed, no HD cells

    N2 fabs are different than N5 fabs. they are not necessarily interchangable. I used to tell investors "Picture the most complicated power plant, Most complicated chemical factory/refinery, most complicated assembly line all rolled into one.... thats a Fab." On the foundry.... Intel does not...
  19. M

    Panther Lake design rules revealed, no HD cells

    Refresh could be anything. to simplify: On the initial set of SKUs which will launch in 2027 but somehow be claimed to be launched in 2026..... I believe the CPU is all N2. Please correct me if I am wrong. This is why the term launch is important.... it means there are products I can buy...
  20. M

    Panther Lake design rules revealed, no HD cells

    I would love to see full technsights report and @Scotten Jones commentary. So the SRAM cell size is .023. The N2 Cells size from TSMC products shown at ISSCC is what? I am not sure we will see Nova lake 18A CPU products. Which skus are not N2?
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