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https://tspasemiconductor.substack.com/p/the-thermal-frontier-of-bspdn-iitc
At the 2025 IEEE ECTC, TSMC unveiled several advanced thermal management solutions aimed at addressing the challenges posed by high power density chips. These include innovations in thermal interface materials (TIMs)...
Seoul, June 10, 2025
SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it presented a new DRAM technology roadmap for the next 30 years and the direction for a sustainable innovation at the IEEE VLSI symposium 20251 held in Kyoto, Japan.
Cha Seon Yong, Chief Technology...
Despite continuous improvements in the performance of EUV photoresists, EUV masks, and post-lithography processes, stochastic defects, or stochastic failures – space bridges and line breaks - are still a major factor of yield loss in EUV production.
The detection of stochastic defects is...
Yeah, there's a big gap from R&D to manufacturing. Volume needs and breeds statistics. Let's not also forget N5 D0>1/cm2 (on average!) at risk production: https://web.archive.org/web/20200525115643/https://www.anandtech.com/show/15219/early-tsmc-5nm-test-chip-yields-80-hvm-coming-in-h1-2020.
Published Fri, Aug 15 202510:21 AM EDT Updated Fri, Aug 15 20254:07 PM EDT
Annie Palmer@in/annierpalmer/@annierpalmer
Key Points
- Government intervention in Intel is “essential” to protect U.S. national security, analyst Gil Luria said.
- Bloomberg reported that the Trump administration is...
The company will halt experienced hiring in the second half for its loss-making System LSI unit
By Jeong-Soo Hwang Published August 13, 2025 at 4:42 PM(KST) Updated August 14, 2025 at 1:04 AM(KST)
Samsung Electronics Co. is stepping up recruitment of seasoned high-bandwidth memory (HBM)...
Apparently, the specs can be checked at PuLin's site. 50 nm alignment won't work. Another system shows 30 WPH, a tenth of the current fastest lithography machine.
The internal product focus seems to convey the message that 18A is good enough for Intel Product even though not in general for external customers. That would be the wrong message to give.
The key problem seems to be "that its latest chip manufacturing process called 18A is going to be mainly used for its own internal products—meaning no major external customer has yet signed up to have Intel make its chips."
The chip maker’s future was dangling by a thread even before CEO controversy
By Asa Fitch and Dan Gallagher
Aug. 12, 2025 5:30 am ET
In March, WSJ explained how a mistake Intel made in the mid-2000s snowballed into one of the biggest challenges now confronting CEO Lip-Bu Tan.
Five months in...
Pilot line operations to begin this year, so presumably some expenditures already: https://techhq.com/news/can-rapidus-rebuild-semiconductor-industry-in-japan/
A more practical reference than Rapidus would be TSMC (obviously): https://www.tsmc.com/static/abouttsmcaz/index.htm
$65 billion for...
4. Intel is cash poor and can’t afford to invest in the capacity needed in the future to replace TSMC or even a reasonable fraction of TSMC capacity. They probably need a cash infusion of $40B or so to be competitive.
Is $40 billion even enough?
This looks like another AI investment research summary: https://www.ainvest.com/news/smic-resilience-geopolitical-trade-pressures-strategic-investment-case-2508/
On technological self-reliance vs. international collaboration
Advocates for SMIC argue that its 5nm technology development through...
