You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
It's already a big task to manage TSMC's IP based in Taiwan: https://www.reuters.com/world/asia-pacific/tsmc-market-system-manage-trade-secrets-its-lawyer-says-2025-08-29/
Continuing from the same article:
The move is also heavily influenced by commercial and economic factors. TSMC’s most significant clients are predominantly American technology companies, including NVIDIA, Apple, Broadcom, and AMD, all of which rely on sourcing the most advanced semiconductor...
Taipei, Sept. 26 (CNA) Taiwan Semiconductor Manufacturing Co. (TSMC) reiterated Friday that the company has not entered discussions with any company about potential investments or partnerships amid ongoing rumors of ailing Intel seeking TSMC's participation.
In a statement, TSMC, the world's...
My understanding from BoA's count was that Intel only received 25 EUV systems during 5N4Y, and then got the 3 High-NA up to H1 this year. With so much less than what TSMC got, shouldn't expect to have the same level of EUV usage and I suppose that doesn't matter.
That report on SK hynix conflicts with this one: https://semiwiki.com/forum/threads/sk-hynix-builds-m15x-test-line-to-respond-to-hbm-demand.23690/
Historically, actual recognized sales has been lower than these forecasts.
ASML shipped five EXE:5000 and one EXE:5200 as of the Q2 2025 earnings call. The EXE:5200 may still be considered a development tool if it is the only High-NA capable of delivering higher power (for higher dose at sufficient throughput) and/or sufficient overlay. The EUV-induced plasma would be...
The trend has been wafer cost up, yield down, SRAM doesn't scale, gate pitch hasn't scaled well either. I think track pitch is starting to slow down as well now as approaching 20 nm.
For DRAM, smaller capacitors need to be relatively taller, otherwise they become swamped by parasitic...
The emergence of high-NA EUV lithography has intensified mask 3D effects, necessitating advanced cleaning solutions for next-generation mask components. Removal of tin (Sn) particles is crucial for maintaining mask performance, as Sn is used to generate EUV light and continuously contaminates...
SK hynix will build a 10nm 5th generation (1b) DRAM production line with a capacity of 10,000 wafers per month at the Cheongju M15X fab. As it is a test line, if mass production is approved, full-scale investment will begin. It is expected that equipment will begin to be brought into M15X as...
This looks very relevant: Real-time observation of EUV-induced blister formation at various sample temperatures in pellicle-like materials
In this study, we investigated degradation mechanisms on pellicle-like, semi-amorphous, 50 nm SiN thin films exposed to both isolated hydrogen radicals and...
Josephson junctions may use e-beam lithography: https://patents.google.com/patent/US20180013052A1/en
I suppose the low volume and small chip size justifies the use of e-beam (short write time), but I imagine they could alternatively use i-line (365 nm) lithography with spacers for higher volumes.
