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Now they didn't, they took write downs on DUV only process node equipment (AKA Intel 7 since everything else is sunset or effectively sunset). 4Q ago they did say Intel 4 cost was higher than expected as they increased Fab34 ramp rate and wound down the Intel 4 line in Oregon faster then...
No, I just mean putting it on the public roadmap. For whatever reason, I frequently use slapping/slapped/slammed something down instead of placed/placing.
I don't know if this is the right way to phrase it, but I also feel like that verbage differentiates it from when various technologies...
I don't think TSMC or Intel's events this year will be too interesting. I suspect the most Intel will talk about is 1 or 2 more 18A derivatives. I'm guessing at the public opening keynote, Intel won't go into any detail about 14A or 10A. Maybe we get some new Foveros or EMIB derivatives...
I don't think so.
IMO they lead and lag in different areas.
Everyone says they have the most advanced advanced packaging. Be it ASE, TSMC, SK Hynix, Intel, Samsung, JCET, or AMKOR. Marketing slides are there to market the product.
For Cu-Cu hybrid bonding TSMC leads. Intel doesn't launch...
Freely available to read news item:
https://library.techinsights.com/sectioned-blog-viewer/6249d381-1cdc-4c8e-bddf-40437f19d94e?utm_source=pardot&utm_medium=email&utm_campaign=701OL00000JfJ5SYAV&utm_content=regular&utm_date=2025-03-25&utm_id=43508100&utm_sam=false&b=banner3
It is crazy how...
When we are just talking about shells, the main difference is roof height and strength over the litho bays and how much structural support is holding up the litho bays. It definitely adds cost and time. But we aren't talking years of extra construction time and billions of extra dollars. Kind of...
TI can seemingly build fabs in TX almost as fast as TSMC does in Taiwan (3 years vs 3 years for a moderately bigger one). If TSMC needs 2x the time to build in the US, that is a TSMC not doing their homework problem, not a USA taking 2x the time and cost to build shells in the problem.
I can think of 4 factors that could be at play.
1) CCG is well known to value performance at all costs. My understanding is they are the sorts of people who will happily pay for that AMG, M series, F sport package, or *insert automobile tuner here* even if it costs double of what the car...
She is a manager not a fellow. Leading and building an organization was her job not innovation. Empowering the right people to do a good job is what a what a good manager should do.
If memory serves I think Navid used to have some fab experience many moons ago. But yes Naga is a much better...
Everybody knows it was Ann's vision not Pat's. Pat just gave her the money and acted as a cheerleader. I don't know why Ann would lie about 5N4Y not being her idea after Pat asked her what she could do with a blank check during prior interviews she has done.
What deliverable in particular are...
That was my point, though. What goals Intel wants to set are arbitrary. Let's say, hypothetically, that back in 2012 Intel said their goal for Intel 10nm was to go into HVM before 2020. Because Intel launching ICL in Sept 2019, 10nm would have been perfectly on time. Now, anyone hearing that...
Considering, 18A is better than 20A, 18A tracking towards launching products within 2025 (4 years after 2021), and every other node on this list came out on time AND with better performance than Intel promised here. Seems like a job well done to me. Now granted 10nm SuperFin and Intel 7 are...
You say that as if it wasn't her idea and her plan... Said plan that she wanted to do before Pat, but she couldn't because Bob was too busy not investing in R&D for her to actually have the resources to execute said catchup plan. And considering the results, I can hardly call 5N4Y an overpromise...
Why would it be doubtful that N2 DD is around N5 levels in a time adjusted manner? All credible indications point to N2 shaping up nicely as they squeeze out the last bits of performance so they can hit 100% of the final UPF target and getting DD and variation to the targets TSMC committed for...
Very weird. I don't really see how Naga is more qualified than Ann to head TD, since he has 0 foundry experience and 0 logic process development experience. Additionally, both have a long manufacturing history and development experience. The one thing I can think that is in Naga's favor is that...
Besides what Fred said about DRAM not living in the same layout hell as logic (with all of the cuts and logic that entails), you must remember that DRAM is much denser than logic. Like 20-22nm min feature size versus 28nm and only recently 23nm. Layouts are also WAY denser too. EUV can paint...
You heard it here first folks. "The ASML monopoly is broken. And the Rosnfet Oil company will soon surpass TSMC and every non Russian semiconductor company is immediately going to go bankrupt."
- every semiconductor "journalist" ever
And yet they have. But we also live in a world where Morris Chang lives the fantasy that American fabs close at night and nobody works overtime (something that hasn't been true since like the 1960s or at the latest the 1970s). So there is that. As for the rest of the article, there is the little...
