Will RISC-V Fall Into the Same Traps as x86 and ARM? Linus Torvalds Thinks So

[Daniel Nenni]

We all love a good tech rivalry, don’t we? It’s Intel versus AMD in the ring again, but this time, there’s a new contender warming up in the corner — RISC-V. Open-source and gaining traction, RISC-V promises a new era of processor design. But hold on! Linus Torvalds, the Godfather of Linux himself, suggests RISC-V might be stumbling towards a familiar pitfall.

The Chasm Between Hardware and Software​

You see, building a processor isn’t just about the silicon. It’s about the intricate dance between hardware and software. And as Torvalds highlighted in a recent talk, that’s where things get messy.

Think of it like this: you’ve got the hardware folks speaking their language — Verilog, circuit diagrams, the works. Then you’ve got the software folks, neck-deep in code, talking kernels, APIs, and user interfaces. The problem? These two worlds often speak different languages.

Repeating History: A Tale of Two Architectures​

Torvalds, with his decades of experience, has seen this play out before. Remember x86? The dominant force in PCs for years? Or ARM, powering everything from your phone to smart refrigerators? Both, according to Torvalds, stumbled over this hardware-software gap early on.

The early x86 days were a wild west of proprietary code and hardware limitations. It took years, countless iterations, and a healthy dose of competition for x86 to become the efficient workhorse it is today.

ARM, while taking a different path, faced its own struggles. Optimizing software for ARM’s diverse ecosystem, ranging from tiny sensors to powerful servers, presented its own set of headaches.

Is RISC-V Destined to Repeat the Mistakes?​

The crux of Torvald’s argument is simple: while RISC-V has the benefit of hindsight and an open-source ethos, the fundamental challenge of bridging the hardware-software divide remains. He argues that RISC-V developers, enthusiastic as they may be, will likely repeat some of the mistakes of their predecessors.

“They’ll have all the same issues we have on the ARM side and that x86 had before them,” Torvalds cautions. Why? Because, as he puts it, “It will take a few generations for them to say, ‘Oh, we didn’t think about that,’ because they have new people involved.”

The Silver Lining: A More Level Playing Field?​

But before we write off RISC-V as “been there, done that,” Torvalds offers a glimmer of hope. The landscape has shifted dramatically since the early days of x86 and ARM. We’re no longer bound by the constraints of PC-centric software. The rise of cloud computing, open-source development, and the sheer variety of devices has created a more level playing field for new architectures like RISC-V.

Looking Ahead: Collaboration is Key​

So, what’s the solution? Torvalds emphasizes the importance of early and frequent collaboration between hardware and software developers. This means building open channels of communication, fostering understanding between disciplines, and embracing the inevitable iterations required to refine the RISC-V ecosystem.

FAQs​

1. What is RISC-V?

RISC-V is an open-source instruction set architecture (ISA) that provides a free and flexible approach to processor design. Unlike proprietary architectures like x86 and ARM, RISC-V allows anyone to design, manufacture, and sell RISC-V-based chips without paying licensing fees.

2. Why is Linus Torvalds concerned about RISC-V?

Torvalds argues that RISC-V, despite its open nature and potential, risks falling into the same trap that plagued earlier architectures: the disconnect between hardware and software development. He believes that without close collaboration, RISC-V could face similar challenges in optimizing software for the hardware.

3. Is Torvalds suggesting that RISC-V will fail?

Not necessarily. Torvalds acknowledges that RISC-V has several advantages, including the lessons learned from x86 and ARM’s evolution. However, he cautions that success hinges on addressing the historical challenges of bridging the gap between hardware and software teams.

4. What does Torvalds suggest to ensure RISC-V’s success?

He emphasizes the need for robust communication and collaboration between hardware and software developers from the outset. Early and frequent interaction, he believes, can help avoid potential pitfalls and lead to a more refined and efficient RISC-V ecosystem.

5. What does this mean for the future of computing?

Torvalds’ comments highlight a crucial aspect of technological advancement: the intricate interplay between hardware and software. Whether RISC-V can overcome these hurdles and fulfill its promise remains to be seen. However, its success could significantly impact the future of computing, potentially leading to more open, diverse, and innovative hardware solutions.

Will RISC-V Fall Into the Same Traps as x86 and ARM? Linus Torvalds Thinks So.

We all love a good tech rivalry, don’t we? It’s Intel versus AMD in the ring again, but this time, there’s a new contender warming up in…

salvacybersec.medium.com

 

[count]

It took Arm a decade before the software ecosystem matured, and Arm benefited from heavy investments and commitments from Apple, Microsoft, Qualcomm, Ampere, Amazon to make it happen. Hundreds of billions of dollars were likely spent developing, maturing, and migrating the software ecosystem to support ARM. I don't think the industry is in a rush to make the same investments again in RISC-V.

 

[semiman]

RISC-V is still miles away from those worries. ISA efficiency itself isn't enough factor to cover software barrier between ISAs(ARM, x86 even Cuda compute capabilities). In the end, CPU backends are all alike. Unless RISC-V finds platform which largely benefits from RISC-V itself(like ARM and smartphone) they'll stay there as-is, free to change their ISAs.

 

[samwilde]

The RISC-V Consortium has been putting out standards on IOMMU, ACPI, and other system components. It is way more standardized than ARM was at this point in development. The reason Linus disliked the ARM environment was because each implementation was pretty much its own custom thing. The ARM ISA was standard but the components around that were not. This made OS development for ARM much more cumbersome.

With the lawsuits between Qualcomm and ARM there is a good chance that Qualcomm will jump into the RISC-V bandwagon. The Chinese government has also been funding alternatives to US based processor designs, and won't buy US processors for the government and government enterprises, so it is another possible avenue of growth there. RISC-V has already been conquering the embedded segment step by step and going up market is just a question of time. Space grade RISC-V hardware already exists and will likely become the standard for satellites. There are several designs of large server like cores, running on simulators, such as from Akeana and the only thing which remains to be done is bring them into actual silicon and put them into systems. This might take another 2 years to do.

 

[count]

RISC-V is still miles away from those worries. ISA efficiency itself isn't enough factor to cover software barrier between ISAs(ARM, x86 even Cuda compute capabilities). In the end, CPU backends are all alike. Unless RISC-V finds platform which largely benefits from RISC-V itself(like ARM and smartphone) they'll stay there as-is, free to change their ISAs.

I agree with this take. Arm found itself a growth platform on smartphones, which brought a lot of capital into development of arm based chips, and once those chips got powerful enough, there was an incentive to find other applications for them.

It took a very strong market force to push Arm into the position it's in today. The market forces driving RISC-V are not nearly as powerful.

 

[IMakeICsAtHomeJK]

It took a very strong market force to push Arm into the position it's in today. The market forces driving RISC-V are not nearly as powerful.

[First Raven1 ST28nm bringup at BWRC June 2012]

____@samwilde mentions RISC-V " . . . will likely become the standard for satellites." Being completely ignorant as to the value-add propositions of the burgeoning ISA, confusion abounds to the question of "Is it worth it?" Am vaguely aware of: (1) lack of licensing fees; (2) documentation of internals, id est, open-source technology; and (3) modularity, which I take to mean enablement of purpose-specific implementations. Using Apple Inc. as a subject, Apple Silicon has been in active use 2020-11-10 (November, 2020), I could only imagine the capital expended upon the transition from a x86-64 (Intel) architecture to the AArch64/ARM64 (ARM) family. Would it be "worth it" for Apple Inc. to undertake a switch to RISC-V (University of California, Berkeley)? (The company may have already begun preliminary exploration of the idea.) And, if it is worth it, what time-scale for adoption is most profitable for a return on the investment into ARM technology?
____Realizing multiple hardware renditions have hosted Apple Inc.'s software, the preceding paragraph's closing question seems the most relevant to discussions of this novel ISA originating from the University of California, Berkeley. This relevancy is only seemingly so given the premise holds true: "A phase-in of RISC-V is worth it for Apple Inc." Indeed, Apple Incorporated evolved from PowerPC, to Intel, and now ARM.
____Being wholly ignorant as to the truth states of the above antecedent, an enumeration of both case's implications follows. {T-"worth it"} If RISC-V is "worth it", then there may be either a slow or fast transition. {F-"not worth it"} If RISC-V is "not worth it", then . . . the industry as a whole will not adopt it? The decision looks to be a 'no-brainer' from a naïve point-of-view. Paying unnecessary licensing fees is anathema to business interests. Really curious as to the novel ISA's practical applicability. The gauge of its effectiveness in reality would perhaps be widespread proliferation.
____ Would really appreciate referrals/recommendations to literature analysing the topic of RISC-V's competitiveness and/or usability. Seeing as how Apple Inc. is reaching deeper into the hardware stack, it shouldn't be ludicrous imagining the development of an instruction set architecture assuming RISC-V is deemed inadequate. The company may well strategize that such an effort is incommensurate with its business objectives. I feel like I have Apple tunnel vision . . . I also feel like Apple's specific case extrapolates well to the general case of industry as a whole . . .
[RISC V prototype chip - crop of: Yunsup Lee holding RISC V prototype chip. At UC Berkeley Par Lab Winter Retreat, January 2013.]