The company also said it expects to have 1 trillion transistors on a single package by then as well.
Credit: TSMC
TSMC has updated its roadmap of sorts, laying out what its semiconductor goals are for the future, stretching all the way to the year 2030. It's kind of a like a corporate vision board, showcasing its plans for ambitious designs that will allow for up to a trillion transistors to be used in a single package. At the same time, it also highlighted its plans to eventually arrive at a watershed metric in semiconductor manufacturing; the production of 1nm transistors.
The company showed off its plans at the recent IEDM conference, and published a roadmap laying out its plans for the future. At the very end of the road lies some truly tantalizing chips, with TSMC stating it will be possible to put a trillion chips on a package using multiple 3D-stacked chiplets. Coincidentally, Intel has also previously stated it thinks one trillion transistors on a package should be possible by 2030 as well. Its CEO, Pat Gelsinger, said last year it envisions using chiplets and advanced packaging technologies to put a trillion transistors on a package while also using chiplets, or tiles in Intel parlance.
TSMC says it'll arrive at 1nm transistors by 2030, allowing for up to 200 billion of them on a monolithic die. Credit: TSMC
TSMC also said monolithic designs could reach 200 billion transistors by 2030 as well. For context, Nvidia's biggest monolithic TSMC die is currently the H100, which has 80 billion transistors. At the same time, current chiplet designs are also getting to be quite large, with Intel's Ponte Vecchio featuring 100 billion transistors, and AMD's new MI300 offering 146 billion transistors.
To hit these goals, TSMC will be progressing to a 2nm process, and then eventually to both 1.4nm and 1nm nodes, according to Tom's Hardware. The roadmap indicates it'll be riding the 3nm train through 2025, then starting 2nm production some time after that. By 2028 it should be on a 1.4nm A14 process, with the 1nm A10 node arriving in 2023.
What's especially interesting about this timeline is Intel is already planning on producing its own 2nm process in 2024, which it calls Intel 20A. After that it's expected to advance to 1.8nm, or Intel 18A, in 2025. As always with Intel, we'll have to wait and see if it hits those targets, but so far the company is saying it's still on-schedule. If Intel can actually produce a 20A CPU in 2024, which is called Arrow Lake, it theoretically will have leapfrogged TSMC for the first time in ages, which was the company's strategy all along with its "five nodes in four years" plan that began in 2021.
Credit: TSMC
TSMC has updated its roadmap of sorts, laying out what its semiconductor goals are for the future, stretching all the way to the year 2030. It's kind of a like a corporate vision board, showcasing its plans for ambitious designs that will allow for up to a trillion transistors to be used in a single package. At the same time, it also highlighted its plans to eventually arrive at a watershed metric in semiconductor manufacturing; the production of 1nm transistors.
The company showed off its plans at the recent IEDM conference, and published a roadmap laying out its plans for the future. At the very end of the road lies some truly tantalizing chips, with TSMC stating it will be possible to put a trillion chips on a package using multiple 3D-stacked chiplets. Coincidentally, Intel has also previously stated it thinks one trillion transistors on a package should be possible by 2030 as well. Its CEO, Pat Gelsinger, said last year it envisions using chiplets and advanced packaging technologies to put a trillion transistors on a package while also using chiplets, or tiles in Intel parlance.
TSMC says it'll arrive at 1nm transistors by 2030, allowing for up to 200 billion of them on a monolithic die. Credit: TSMC
TSMC also said monolithic designs could reach 200 billion transistors by 2030 as well. For context, Nvidia's biggest monolithic TSMC die is currently the H100, which has 80 billion transistors. At the same time, current chiplet designs are also getting to be quite large, with Intel's Ponte Vecchio featuring 100 billion transistors, and AMD's new MI300 offering 146 billion transistors.
To hit these goals, TSMC will be progressing to a 2nm process, and then eventually to both 1.4nm and 1nm nodes, according to Tom's Hardware. The roadmap indicates it'll be riding the 3nm train through 2025, then starting 2nm production some time after that. By 2028 it should be on a 1.4nm A14 process, with the 1nm A10 node arriving in 2023.
What's especially interesting about this timeline is Intel is already planning on producing its own 2nm process in 2024, which it calls Intel 20A. After that it's expected to advance to 1.8nm, or Intel 18A, in 2025. As always with Intel, we'll have to wait and see if it hits those targets, but so far the company is saying it's still on-schedule. If Intel can actually produce a 20A CPU in 2024, which is called Arrow Lake, it theoretically will have leapfrogged TSMC for the first time in ages, which was the company's strategy all along with its "five nodes in four years" plan that began in 2021.