TSMC Q3 2023 Results are Good!

[Daniel Nenni]

The pandemic has truly been a crazy time in the semiconductor industry. I keep wondering when we will get back to the norm? We might be close. From the TSMC press release::

Compared to second quarter 2023, third quarter results represented a 13.7% increase in revenue and a 16.1% increase in net income. All figures were prepared in accordance with TIFRS on a consolidated basis. In US dollars, third quarter revenue was $17.28 billion, which decreased 14.6% year-over-year and increased 10.2% from the previous quarter. Gross margin for the quarter was 54.3%, operating margin was 41.7%, and net profit margin was 38.6%.

In the third quarter, shipments of 3-nanometer accounted for 6% of total wafer revenue; 5-nanometer accounted for 37%; 7-nanometer accounted for 16%. Advanced technologies, defined as 7-nanometer and more advanced technologies, accounted for 59% of total wafer revenue.

“Our third quarter business was supported by the strong ramp of our industry-leading 3-nanometer technology and higher demand for 5-nanometer technologies, partially offset by customers’ ongoing inventory adjustment,” said Wendell Huang, VP and Chief Financial Officer of TSMC. “Moving into fourth quarter 2023, we expect our business to be supported by the continued strong ramp of our 3-nanomenter technology, partially offset by customers’ continued inventory adjustment.”

Based on the Company’s current business outlook, management expects the overall performance for fourth quarter 2023 to be as follows:
Revenue is expected to be between US$18.8 billion and US$19.6 billion;
Gross profit margin is expected to be between 51.5% and 53.5%;
Operating profit margin is expected to be between 39.5% and 41.5%.

 

[Daniel Nenni]

Interesting comments from the opening of the call:

Wendell Huang
We now expect our 2023 CapEx to be approximately US$32 billion. Out of the approximately US$32 billion CapEx for 2023, about 70% of the capital budget will be allocated for advanced process technologies, about 20% will be spent for specialty technologies and about 10% will be spent for advanced packaging, testing, mask-making and others.

Dr. C. C. Wei
Thank you, Wendell. Good afternoon, everyone. First, let me start with our near-term demand and inventory. We concluded our third quarter with revenue of US$17.3 billion, in line with our guidance in U.S. dollar terms. Our business in the third quarter was supported by the strong ramp of our industry-leading 3-nanometer technology and higher demand for 5-nanometer technologies, partially offset by customers' ongoing inventory adjustment.

Moving into first quarter 2023. While AI-related demand continues to be strong, it is not enough to offset the overall cyclicality of our business. We expect our business in the fourth quarter to be supported by the continuing ramp of our 3-nanometer technology, partially offset by customers' continued inventory adjustment.

On the inventory side, we expect the fabless semiconductor inventory to have continuously reduced in the third quarter. However, due to the persistent weaker overall macroeconomic conditions and slow demand recovery in China, customers remain cautious in their inventory control. Thus, we expect the inventory digestion to continue in the fourth quarter. Having said that, we are observing some early sign of demand stabilization in the PC and smartphone end market. Together with such level of inventory control, we forecast the fabless semiconductor inventory to further reduce and exit 4Q '23 at a healthier level.

Next, let me talk about our global manufacturing footprint update. TSMC's mission is to be the trusted technology and capacity provider of the global logic IC industry for years to come. As we have said before, our strategy is to expand our global manufacturing footprint to increase customer trust, expand our future growth potential and reach for more global talents. Our overseas decisions are based on our customers' need and the necessary level of government support. This is to maximize the value for our shareholders.

In Europe, after conducting extensive due diligence, we announced our plan to build a specialty technology fab in Dresden, Germany focusing on automotive and industrial applications. We have received a strong commitment to support this project from our JV partners, the European Commission government and German federal, state and city governments. These fabs will utilize 22- and 28-nanometer and 12-, 16-nanometer technologies for semiconductor wafer fabrication. Fab construction is scheduled to begin in second half 2024 and production is targeted to begin in late 2027.

In Arizona, we are receiving strong support from the city of Phoenix, State of Arizona and U.S. federal government and continue to develop positive relationship and work closely with our local trade and union partners. We are making good progress on the fab infrastructure, utilities, and equipment installation issues in our first fab and the situation is improving. We have also begun early preparation for our Arizona fab operations and hired close to 1,100 local TSMC employees so far.

Many of them has been brought to Taiwan for extensive hands-on experience in our fab, so that they can further their technical fields who are being emerged in TSMC operation environment and culture. We continue to target volume production of N4 process technology in first half 2025 and are confident that once we begin operations, we will be able to deliver the same level of manufacturing, quality and reliability in Arizona as from our fabs in Taiwan.

In Japan, we built a specialty technology fab, which will utilize 12- and 16-nanometer and 22- and 28-nanometer process technologies. We have hired approximately 800 local TSMC employees so far with the majority having similar being brought to Taiwan for hands-on experience. Equipment moving has begun this month and volume production is on track for late 2024.

In China, we have recently received an extension from the U.S. Bureau of Industry and Security to continue our operation in Nanjing. We are currently in the process of applying for validated end user authorization and expect to receive a prominent authorization in the near future.

From a cost perspective, the initial cost of overseas fabs are higher than TSMC fab in Taiwan due to, first, smaller fab scale; second, higher costs throughout the supply chain; and third, the early stage of semiconductor ecosystem overseas as compared to a matured ecosystem in Taiwan. TSMC's responsibility to manage and minimize the cost gap to maximize the return for our shareholders. Our pricing will also remain strategic to reflect our value, which include the value of geographic flexibility.

We will also work closely with government to secure their support. At the same time, we are leveraging our fundamental competitive advantage of manufacturing technology leadership, large volume economies of scale to continuously drive our cost down. By taking such actions, TSMC have the ability to absorb the higher cost of overseas fabs and still deliver the long-term gross margin of 53% and higher and sustainable ROE greater than 25%. We remain firm in our commitment to maximize the value for our shareholders.

Now let me talk about N3 and N3E ramp-up and progress. Our 3-nanometer technology, the most advanced semiconductor technology in both PPA and transistor technology. N3 is already involving production with good yield, and we are seeing a strong ramp in the second half of this year, supported by both HPC and smartphone applications. We reaffirm N3 will contribute a mid-single-digit percentage of our total wafer revenue in 2023, and we expect a much higher percentage in 2024 supported by robust demand for multiple customers.

N3E will leverage the strong foundation of N3 to further extend our N3 family with enhanced performance, power and yield and provide complete platform support for both HPC and smartphone applications. N3E has passed qualification and achieved performance and yield targets and will start volume production in fourth quarter of this year. We also continue to provide further enhancement of N3 technology, including N3P and N3X.

With our strategy of continuous enhancement of our 3-nanometer process technologies, we expect strong multi-yield demand from our customers and we are competent that our 3-nanometer family will be another large and long-lasting node for TSMC.

Finally, I will talk about the N2 status. The recent surge in AI-related demand supports our already strong conviction that demand for energy-efficient computing will accelerate in an intelligent and connected world. The value of our technology platform is expanding beyond the scope of geometry string along and increasing toward great power efficiency.

In addition, as process technology complexity increases, the lead time and engagement with customers also started much earlier. As a result, we are observing a strong level of customer interest and engagement at our N2 similar to or higher than N3 at a similar stage from both HPC and smartphone applications.

Our 2-nanometer technology will be the most advanced semiconductor technology in the industry in both density and energy efficiency when it is introduced in 2025. Our N2 technology development is progressing well and on track for volume production in 2025. Our N2 adopt nanosheet transistor structure, which has demonstrated excellent power efficiency and toward deliver full node performance and power benefit to address the increasing need for energy-efficient computing.

As part of N2-technology platform, we also developed N2 with backside power rail solution, which is the best suited for HPC applications. We are targeting backside power rail to be available in the second half of 2025 to customers with production in 2026. With our strategy of continuous enhancement, N2 and its derivative will further extend our technology leadership well into the future.

 

[Daniel Nenni]

Funny comments from the Q&A:

Gokul Hariharan
Congratulations on a great result, and thanks for the details on N3 and N2. My first question is on the technology leadership. Given we are hearing a lot of competitive messaging from your U.S. IDM competitors/customer in the last few months, Intel seems to think that they will be getting into technology or process technology leadership in 2025. Just wanted to hear what does TSMC think of Intel's claim?

Dr. C. C. Wei
Well, Gokul, this is C. C. Wei. Let me answer your question with a very simple answer, said, no. But what I was stated a little bit long? Actually, we do not underestimate any of our competitors or take them lightly.

D.A.N.

Dr. C. C. Wei
Having said that, our internal assessment shows our N3P, now I repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology, maturity and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N4P and 18A, and while the semiconductor industry is most advanced technology when it is introduced in 2025.

D.A.N.
As I have commented before, CC Wei is a fierce competitor which is a big change for TSMC from previous management.

Charlie Chan
So first question is about, do you see that overall fab utilization to pick up anytime soon?

Dr. C. C. Wei
Well, Charlie, this is C. C. Wei, again. Let me answer your question. As I said, we do observe some early signs of demand stabilization in PC and smartphone end markets. Those two segments are the biggest segment for TSMC's business. We want to say that 2024 will be a very healthy growth. But right now, did we see the bottom very close. We want to -- I cannot give you a number, it's because it's too early to call it a sharp rebound.

D.A.N.
Let's hope for a sharp rebound in 2024, absolutely. There was AI discussions but this is the best statement:

Dr. C. C. Wei
Okay. Let me answer, whether customer developed the CPU, GPU, AI accelerator or ASIC for all the type for AI applications, the commonality is that they all require usage of leading-edge technology with stable yield delivery to support larger die size and a strong -- design ecosystem. All of those are TSMC's strength. So, we are able to address and capture a major portion of the market in terms of a semiconductor component in AI.

N2 Challenges:

Dr. C. C. Wei
I'll answer that other as technology moving into more and more advanced node, the challenge is always there. Technology complexity increase dramatically. But we can do it, no doubt about it. And we still remain the technology leadership in this industry.

If you ask me, what is the most challenging part, I would say it's cost. I mean, that you look at it today inflation, everything, and the tool have become more and more expensive. Although, we can do it on time to meet customers' requirement.

Our challenge right now, actually, I would say, number one, cost. I want to reduce the cost so more customers can afford it. But even with that, actually, we have a lot of customer interested and engaged with the TSMC today. Actually, it's probably higher than the N3 at a similar stage. Okay.

D.A.N.
This is a bit of a surprise to me. The Intel 18A, Samsung 3nm, and TSMC N2 PDKs that are out now are very competitive. Intel is leading on performance, TSMC is leading on density and power, and Samsung is rumored to be strategically pricing their wafers below Intel and TSMC. I have not heard specifics but previously Samsung was 10-20% less than TSMC.

The one thing that TSMC has, which is a great advantage, is the ecosystem. With 90%+ of the design starts on N3x, the 3nm ecosystem is all about TSMC. That will carry over to the N2 design starts and enable the masses. My big question is cost. CC Wei mentioned cost as their biggest N2 challenge so we shall see how it all plays out. I still do think a lot of business will stay with N3 until the second wave of N2 comes about which will hopefully have a cost reduction.

Question on automotive demand (which is down 24% this quarter):

Dr. C. C. Wei
So let me answer the question on automotive demand. In fact, in the past three years, automotive demand is very strong. And we deliver whatever they asked. And today, I think the automotive demand already entered the inventory adjustment mode in the second half of 2023. However, we still expect the automotive demand will increase again in 2024 because the more and more EV, more and more functionality being added to automotive. And that's what we saw.

Question on 7nm utilization which is down again this quarter:

Dr. C. C. Wei
Now talking about the N7, the 7-nanometer technology, why we have such a low utilization or the revenue decrease, it's go beyond our initial original plan because of -- we expect the N7 to be very fully utilized even now, but it is not. Let me answer the question because of -- we suddenly have -- in 10 years, the smartphone demand dropped dramatically from about 1.4 billion units to about 1.1 billion now. So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization.

But saying that, we are confident to backfill our 7-, 6-nanometer capacity with additional wave of specialty demand from consumer, RF, connectivity and other applications and will return to a healthy level of utilization over the next several years. This is very similar to a situation that we have 28-nanometer, back in 2018 and 2019 time frame, okay? At the beginning, it was underutilized for a period of time, and we worked hard to -- with our customer and then for developers, some specialty technologies and then now we have to expand 28-nanometer specialty capacity. That's the same kind of a story.

Question on Edge AI requiring leading process technology:

Dr. C. C. Wei
Well, the edge device start to -- that's including smartphone and PC, start to incorporate the AI functionality inside. We observed some of the neural engines has been added increasingly. So, the die size will increase even the unit did not increase dramatically. But the die size is in mid-teens -- or no, I mean, mid-single digit is the die-size increase so far. And I expect that this kind of trend will continue.

And so more and more application of the -- on the AI side, what be incorporated into those kind of edge device. And that one need a very power-efficient chips to put into the edge device, especially when it is mobile. So I do expect -- for my own perspective, I do expect that my customer will move into the leading edge node more and more quickly to compete in the market.

Question about silicon photonics:

Dr. C. C. Wei
Okay. Let me answer that question. Silicon photonics actually is growing its importance because of just a larger amount of data need to be collected to process and transfer in an energy-efficient manner. Silicon photonics tends to be the best to fit that role. And TSMC have been working on silicon photonics for years and most importantly, we're collaborating with multiple leading customer and -- to support their innovations in this field.

It takes a lot of time to develop the technology and to build the capacity. And when we increased the volume production, we believe that TSMC's silicon photonics will be the best technology and when customer roll out all their innovations. But as I said, it's gradually increasing in their activity and gradually increasing their demand as of today.

Question about advanced packaging:

Dr. C. C. Wei
Let me answer that. It's not because of increasing of the cost in the more advanced node. And actually, they tried to -- our customers tried to maximize the system performance. That's the major portion. That, including the kind of speed improvement or the power consumption decrease, all those kind of things, put it all together and maybe cost is also part of the consideration which we noticed about.

And so more and more customers moving into the very advanced technology node, and they start to adopt the chip-based approaches. And so, that no matter what, TSMC provide industry-leading solution in both leading technology and also well-advanced packaging technology, and to work with our customer for their product and have a best system performance.

And the other one is, you are asking about the SOIC, when it will become a high volume and more substantial revenue for TSMC. It's coming. It's coming. Actually, the customer already ready to announce their new product, which are widely adopt, and I expect starting from now and next year, the SOIC will generate revenue and become one of the faster-growing advanced packaging solution in the next few years.

Question about CoWoS:

Dr. C. C. Wei
Well, Sunny, the last time we said that we will double our CoWoS capacity. We are working very hard to increase the capacity more than double, but today is limited by my suppliers' capability or their capacity. So we still maintain that we will double our CoWoS capacity by the end of 2024. But the total output actually is more than double from 2023 to 2024 because of a very high demand in -- from our customer. So actually then, this kind of a trend will continue to increase our CoWoS capacity to support our customers even into 2025.

D.A.N.
Great call, the drop in customer inventory is a very good sign, absolutely!

 

[Daniel Nenni]

Presentation materials:

 

[hist78]

Funny comments from the Q&A:

Gokul Hariharan
Congratulations on a great result, and thanks for the details on N3 and N2. My first question is on the technology leadership. Given we are hearing a lot of competitive messaging from your U.S. IDM competitors/customer in the last few months, Intel seems to think that they will be getting into technology or process technology leadership in 2025. Just wanted to hear what does TSMC think of Intel's claim?

Dr. C. C. Wei
Well, Gokul, this is C. C. Wei. Let me answer your question with a very simple answer, said, no. But what I was stated a little bit long? Actually, we do not underestimate any of our competitors or take them lightly.

D.A.N.

Dr. C. C. Wei
Having said that, our internal assessment shows our N3P, now I repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology, maturity and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N4P and 18A, and while the semiconductor industry is most advanced technology when it is introduced in 2025.

D.A.N.
As I have commented before, CC Wei is a fierce competitor which is a big change for TSMC from previous management.

Charlie Chan
So first question is about, do you see that overall fab utilization to pick up anytime soon?

Dr. C. C. Wei
Well, Charlie, this is C. C. Wei, again. Let me answer your question. As I said, we do observe some early signs of demand stabilization in PC and smartphone end markets. Those two segments are the biggest segment for TSMC's business. We want to say that 2024 will be a very healthy growth. But right now, did we see the bottom very close. We want to -- I cannot give you a number, it's because it's too early to call it a sharp rebound.

D.A.N.
Let's hope for a sharp rebound in 2024, absolutely. There was AI discussions but this is the best statement:

Dr. C. C. Wei
Okay. Let me answer, whether customer developed the CPU, GPU, AI accelerator or ASIC for all the type for AI applications, the commonality is that they all require usage of leading-edge technology with stable yield delivery to support larger die size and a strong -- design ecosystem. All of those are TSMC's strength. So, we are able to address and capture a major portion of the market in terms of a semiconductor component in AI.

N2 Challenges:

Dr. C. C. Wei
I'll answer that other as technology moving into more and more advanced node, the challenge is always there. Technology complexity increase dramatically. But we can do it, no doubt about it. And we still remain the technology leadership in this industry.

If you ask me, what is the most challenging part, I would say it's cost. I mean, that you look at it today inflation, everything, and the tool have become more and more expensive. Although, we can do it on time to meet customers' requirement.

Our challenge right now, actually, I would say, number one, cost. I want to reduce the cost so more customers can afford it. But even with that, actually, we have a lot of customer interested and engaged with the TSMC today. Actually, it's probably higher than the N3 at a similar stage. Okay.

D.A.N.
This is a bit of a surprise to me. The Intel 18A, Samsung 3nm, and TSMC N2 PDKs that are out now are very competitive. Intel is leading on performance, TSMC is leading on density and power, and Samsung is rumored to be strategically pricing their wafers below Intel and TSMC. I have not heard specifics but previously Samsung was 10-20% less than TSMC.

The one thing that TSMC has, which is a great advantage, is the ecosystem. With 90%+ of the design starts on N3x, the 3nm ecosystem is all about TSMC. That will carry over to the N2 design starts and enable the masses. My big question is cost. CC Wei mentioned cost as their biggest N2 challenge so we shall see how it all plays out. I still do think a lot of business will stay with N3 until the second wave of N2 comes about which will hopefully have a cost reduction.

Question on automotive demand (which is down 24% this quarter):

Dr. C. C. Wei
So let me answer the question on automotive demand. In fact, in the past three years, automotive demand is very strong. And we deliver whatever they asked. And today, I think the automotive demand already entered the inventory adjustment mode in the second half of 2023. However, we still expect the automotive demand will increase again in 2024 because the more and more EV, more and more functionality being added to automotive. And that's what we saw.

Question on 7nm utilization which is down again this quarter:

Dr. C. C. Wei
Now talking about the N7, the 7-nanometer technology, why we have such a low utilization or the revenue decrease, it's go beyond our initial original plan because of -- we expect the N7 to be very fully utilized even now, but it is not. Let me answer the question because of -- we suddenly have -- in 10 years, the smartphone demand dropped dramatically from about 1.4 billion units to about 1.1 billion now. So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization.

But saying that, we are confident to backfill our 7-, 6-nanometer capacity with additional wave of specialty demand from consumer, RF, connectivity and other applications and will return to a healthy level of utilization over the next several years. This is very similar to a situation that we have 28-nanometer, back in 2018 and 2019 time frame, okay? At the beginning, it was underutilized for a period of time, and we worked hard to -- with our customer and then for developers, some specialty technologies and then now we have to expand 28-nanometer specialty capacity. That's the same kind of a story.

Question on Edge AI requiring leading process technology:

Dr. C. C. Wei
Well, the edge device start to -- that's including smartphone and PC, start to incorporate the AI functionality inside. We observed some of the neural engines has been added increasingly. So, the die size will increase even the unit did not increase dramatically. But the die size is in mid-teens -- or no, I mean, mid-single digit is the die-size increase so far. And I expect that this kind of trend will continue.

And so more and more application of the -- on the AI side, what be incorporated into those kind of edge device. And that one need a very power-efficient chips to put into the edge device, especially when it is mobile. So I do expect -- for my own perspective, I do expect that my customer will move into the leading edge node more and more quickly to compete in the market.

Question about silicon photonics:

Dr. C. C. Wei
Okay. Let me answer that question. Silicon photonics actually is growing its importance because of just a larger amount of data need to be collected to process and transfer in an energy-efficient manner. Silicon photonics tends to be the best to fit that role. And TSMC have been working on silicon photonics for years and most importantly, we're collaborating with multiple leading customer and -- to support their innovations in this field.

It takes a lot of time to develop the technology and to build the capacity. And when we increased the volume production, we believe that TSMC's silicon photonics will be the best technology and when customer roll out all their innovations. But as I said, it's gradually increasing in their activity and gradually increasing their demand as of today.

Question about advanced packaging:

Dr. C. C. Wei
Let me answer that. It's not because of increasing of the cost in the more advanced node. And actually, they tried to -- our customers tried to maximize the system performance. That's the major portion. That, including the kind of speed improvement or the power consumption decrease, all those kind of things, put it all together and maybe cost is also part of the consideration which we noticed about.

And so more and more customers moving into the very advanced technology node, and they start to adopt the chip-based approaches. And so, that no matter what, TSMC provide industry-leading solution in both leading technology and also well-advanced packaging technology, and to work with our customer for their product and have a best system performance.

And the other one is, you are asking about the SOIC, when it will become a high volume and more substantial revenue for TSMC. It's coming. It's coming. Actually, the customer already ready to announce their new product, which are widely adopt, and I expect starting from now and next year, the SOIC will generate revenue and become one of the faster-growing advanced packaging solution in the next few years.

Question about CoWoS:

Dr. C. C. Wei
Well, Sunny, the last time we said that we will double our CoWoS capacity. We are working very hard to increase the capacity more than double, but today is limited by my suppliers' capability or their capacity. So we still maintain that we will double our CoWoS capacity by the end of 2024. But the total output actually is more than double from 2023 to 2024 because of a very high demand in -- from our customer. So actually then, this kind of a trend will continue to increase our CoWoS capacity to support our customers even into 2025.

D.A.N.
Great call, the drop in customer inventory is a very good sign, absolutely!

" So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization."

I'm wondering who is that major customer? Intel?

 

[Daniel Nenni]

" So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization."
I'm wondering who is that major customer? Intel?

That would be my guess. Intel used N7 for several chiplets. So Intel and the smartphone drop:

the smartphone demand dropped dramatically from about 1.4 billion units to about 1.1 billion now. So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization.

 

[hist78]

That would be my guess. Intel used N7 for several chiplets. So Intel and the smartphone drop:

the smartphone demand dropped dramatically from about 1.4 billion units to about 1.1 billion now. So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization.

If this is Intel, is it due to the challenge of market condition, Intel's internal design and/or manufacturing problems, or Intel's own financial constraints?

Or Intel found out certain upcoming products are not competitive enough in this fast changing world?

 

[Piefkee]

It seems Intel webt a little over the line with all their claims that TSMC making this Kind of statements…

Dr. C. C. Wei
Having said that, our internal assessment shows our N3P, now I repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology, maturity and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N4P and 18A, and while the semiconductor industry is most advanced technology when it is introduced in 2025.

 

[lefty]

That would be my guess. Intel used N7 for several chiplets. So Intel and the smartphone drop:

the smartphone demand dropped dramatically from about 1.4 billion units to about 1.1 billion now. So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization.

but Intel didn't delay any products... not recently anyways

 

[Daniel Nenni]

It seems Intel webt a little over the line with all their claims that TSMC making this Kind of statements…

Dr. C. C. Wei
Having said that, our internal assessment shows our N3P, now I repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology, maturity and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N4P and 18A, and while the semiconductor industry is most advanced technology when it is introduced in 2025.

You know, I constantly warn the foundries about bashing each other. Same thing with the ecosystem. The problem is it gets personal and it is really like peeing in the family pool.

My big issue is when people constantly mention the risk of something bad happening to Taiwan. When Globalfoundries first started they said "what if an earthquake or typhoon flattens Taiwan" in an attempt to discredit TSMC. And we all know how that strategy worked out. Now that Israel is at war maybe Intel fans will stop blathering about a war in Taiwan because as we should all know it could happen anywhere, right?

Bottom line: This is a new TSMC with CC Wei at the helm, absolutely.

 

[Daniel Nenni]

but Intel didn't delay any products... not recently anyways

Intel did delay the first chiplet product involving TSMC. Connecting all of those chiplets and packaging them up for the first time was not as easy as it looked on PPT. I also believe the Intel forecast for TSMC wafers was a bit optimistic, Intel did a prepay type of deal. This was all under Bob Swan, not Pat G. and remember, TSMC does not breakout N7 and N6 so this includes N6 wafers.

 

[Daniel Nenni]

The one thing TSMC did not comment on was a forecast for 2024. That is usually given on the Q4 call in January. My guess is that 2024 will be a big year for TSMC with a revenue increase of 25%. TSMC will probably say 20% to be on the safe side. Notice TSMC did not lower CAPEX? The first N3 revenue looks promising and since the big ramp will be 2024/2025 the next two years should be great, absolutely. Unless of course the world does something stupid.

 

[lefty]

Intel did delay the first chiplet product involving TSMC.

.. but not recently. They are obviously talking about a customer that delayed their product this year. Meteor lake was delayed, but that happen a few years ago, since then they're have been no delays

 

[lefty]

I'm just surprised we are talking about Meteor lake, when we should be talking about this statement:

internal assessment shows that our N3P -- now, I'll repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology maturity, and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N3P and 18A

 

[Daniel Nenni]

I'm just surprised we are talking about Meteor lake, when we should be talking about this statement:

I can assure you it was unscripted but seemed like a fair answer to the question. Is it true? I need to look more into that but I'm sure CC believes it to be true. To get a fair comparison of N3P and 18A Intel will need to fab a customer's chip versus their own, my opinion.

In calls before CC was CEO TSMC would not answer that question. It will be interesting to see how Pat G. responds when he is asked a similar question. It could get personal.

Gokul Hariharan
Congratulations on a great result, and thanks for the details on N3 and N2. My first question is on the technology leadership. Given we are hearing a lot of competitive messaging from your U.S. IDM competitors/customer in the last few months, Intel seems to think that they will be getting into technology or process technology leadership in 2025. Just wanted to hear what does TSMC think of Intel's claim?

Dr. C. C. Wei
Well, Gokul, this is C. C. Wei. Let me answer your question with a very simple answer, said, no. But what I was stated a little bit long? Actually, we do not underestimate any of our competitors or take them lightly. Having said that, our internal assessment shows our N3P, now I repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology, maturity and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N4P and 18A, and while the semiconductor industry is most advanced technology when it is introduced in 2025.

 

[Maximus]

Dr. C. C. Wei
Well, Gokul, this is C. C. Wei. Let me answer your question with a very simple answer, said, no. But what I was stated a little bit long? Actually, we do not underestimate any of our competitors or take them lightly. Having said that, our internal assessment shows our N3P, now I repeat again, N3P technology, demonstrated comparable PPA to 18A, my competitors' technology, but with an earlier time to market, better technology, maturity and much better cost. In fact, let me repeat again, our 2-nanometer technology without backside power is more advanced than both N4P and 18A, and while the semiconductor industry is most advanced technology when it is introduced in 2025.

CC Wei emphasized "N3P" again when he made comparison to 18A. It's really a very strong claim.

 

[Maximus]

" So that exactly, in this time frame, the N7's utilization has been impacted and followed by one major customer who delayed their product introduction. And so that's why we have a low utilization."

I'm wondering who is that major customer? Intel?

Digitimes imply Apple's RF and Wi-fi chips.

 

[Piefkee]

.. but not recently. They are obviously talking about a customer that delayed their product this year. Meteor lake was delayed, but that happen a few years ago, since then they're have been no delays

It is meteor lake. It will launch on December 12 on paper with absolutly no Volume. Real Volume is end of q1 or beginning of q2.

 

[nghanayem]

Our challenge right now, actually, I would say, number one, cost. I want to reduce the cost so more customers can afford it. But even with that, actually, we have a lot of customer interested and engaged with the TSMC today. Actually, it's probably higher than the N3 at a similar stage. Okay.

D.A.N.
This is a bit of a surprise to me. The Intel 18A, Samsung 3nm, and TSMC N2 PDKs that are out now are very competitive. Intel is leading on performance, TSMC is leading on density and power, and Samsung is rumored to be strategically pricing their wafers below Intel and TSMC. I have not heard specifics but previously Samsung was 10-20% less than TSMC.

The one thing that TSMC has, which is a great advantage, is the ecosystem. With 90%+ of the design starts on N3x, the 3nm ecosystem is all about TSMC. That will carry over to the N2 design starts and enable the masses. My big question is cost. CC Wei mentioned cost as their biggest N2 challenge so we shall see how it all plays out. I still do think a lot of business will stay with N3 until the second wave of N2 comes about which will hopefully have a cost reduction.

I suppose I am not super surprised by the N2 engagement statement. TSMC is going to GAA and later down the track BSPD. That is a big change for EDA and designers to get used to, so I wouldn't be surprised if alot of folks are engaging with TSMC earlier than they normally would so they don't have huge product side delays on account of the different optimization points.

I can assure you it was unscripted but seemed like a fair answer to the question. Is it true? I need to look more into that but I'm sure CC believes it to be true. To get a fair comparison of N3P and 18A Intel will need to fab a customer's chip versus their own, my opinion.

In calls before CC was CEO TSMC would not answer that question. It will be interesting to see how Pat G. responds when he is asked a similar question. It could get personal.

Agreed Dan, I doubt TSMC is lying on an earnings call. TSMC's broad statement is in all likelihood to the best of their knowledge. At the end of the day intel is making projections when they say that when 18A products launch 18A will have the best performance per watt vs the competition (whatever that claim means), and TSMC is making projections when they say N3P is in the same ballpark and that N2 is "more advanced" than 18A (whatever those claims mean). As always the chip designers are the final arbitrators of this debate.

It is meteor lake. It will launch on December 12 on paper with absolutly no Volume. Real Volume is end of q1 or beginning of q2.

What you say is not consistent with TSMC's claim. They claimed that their utilization was lower on N7/6 fabs because a customer pushed their orders out from the original Q3 plan. If we were to assume that pushout was mtl and if we assumed that intel then started up their orders in Q4, then the absolute earliest mtl could launch is late Q3 of next year. So unless you believe that we will see cannonlake volume of mtl laptops until Q3 2024 I see no way how this pushout could have been meteor lake.

 

[Piefkee]

What you say is not consistent with TSMC's claim. They claimed that their utilization was lower on N7/6 fabs because a customer pushed their orders out from the original Q3 plan. If we were to assume that pushout was mtl and if we assumed that intel then started up their orders in Q4, then the absolute earliest mtl could launch is late Q3 of next year. So unless you believe that we will see cannonlake volume of mtl laptops until Q3 2024 I see no way how this pushout could have been meteor lake

It is a earning call, so they speak about "finished goods, tile" there is only the packaging left. This will not take one year. You will see the after the 12. december paper launch and at CES how many MTL notebacks are for sale...