Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/tsmc-introduces-foundry-2-0.20635/page-2
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

TSMC Introduces Foundry 2.0

In my understanding, TSMC made the decision not to integrate other foundry chiplets in their packaging due to the current shortage of packaging. It was not a technical decision, purely business which I agree with. Will they open up their packaging to other die in the future? I don't see how they cannot and remain competitive once the tidal wave of chiplets begin.

AMD may already be working with TSMC on integrating legacy GF die into their current products, according to hallway rumors of course.
Will the mixed chiplets eventually be called as "Virtual IDM" with alliance partners from all supply chains?
 
Seem like TSMC is again following Intel
I've been reading "Marketing High Technology: An Insider's View"*, and while I think TSMC is a lot smarter than this, there is an argument that TSMC by rolling out it's own "Foundry 2.0", they're falling into a marketing trap laid by Intel.

In Operation Crush, Intel put out a spectacular looking (but desperately conceived) roadmap (among other efforts), and Motorola responded with their own roadmap that didn't look as impressive and was actually rushed. In short, in undermined Motorola's credibility despite the buzz of the press, media, and customers being strongly in their favor. (Note: TSMC has extremely complete products (except integrating chips from other fabs), which was another major weak spot of Motorola that Intel exploited).

Now, I don't see TSMC getting upset this decade by Intel's foundry efforts but just interesting to watch Intel vs. TSMC unfold. Intel was the first to announce the "Angstrom era", and TSMC later updated their roadmap with "A" products. Now it's Foundry 2.0. Oh, and High NA is coming later at TSMC. These may be shrewd planning on TSMC's part or weak spots in the armor.

..

*A big Thank you to whomever on here recommended the book -- getting the inside story on Operation Crush vs. Motorola alone was excellent.

Seems Deja Vu, wait for Intel and TSMC will copy
 
Seem like TSMC is again following Intel
Seems Deja Vu, wait for Intel and TSMC will copy

Most definitely. TSMC did however beat Intel to EUV and Intel followed TSMC into the foundry business. Healthy competition is always a good thing. Price cutting and dumping wafers is not.

It is too soon to tell who has the best BSPD. Intel will be first but TSMC has big customer support behind them.
 
Most definitely. TSMC did however beat Intel to EUV and Intel followed TSMC into the foundry business. Healthy competition is always a good thing. Price cutting and dumping wafers is not.
They were also beat intel to DUV-immersion. TSMC always seemed to love being on the cutting edge of equipment, meanwhile intel was always trying to squeeze out every last mile of their existing tooling.
It is too soon to tell who has the best BSPD. Intel will be first but TSMC has big customer support behind them.
I don't think it is too soon to make that call. From a pure technology perspective TSMC's SPR is objectively more advanced. Direct BS-contact vs the nanoTSVs intel showed off on intel 4+powervia. There should be less R, C, and in theory you can shrink the cell boundaries more. As for implementation intel objectively has the lead over TSMC on this one. TSMC is using the same standard cells with SPR seemingly being for a lack of better words "bolted on". Per TSMC they say the density improvements are from increased utilization on designs limited by their PDNs. Intel on the other hand didn't really have to make a trade-off for DR compatibility by only supporting BSPD. Thus they reduced FS metal tracks and also relaxed MMP giving an areal cost improvement over a hypothetical FS-PDN 18A in addition to the power-performance improvement BSPD gives you.

Either way you are for sure right on the TTM aspect. Things are kind of weird with intel and TSMC being offset. 18A products in 2025 vs N2 products in 2026. If intel achieves 14A 2yrs after 18A, then 2027 should have A16 and 14A products launching side by side. After that maybe we see a BSP only A14 which is an extension of N2/A16 but moves from 6 M0 tracks to 5T or maybe even 4T with a second mint layer like in the recent IMEC paper? If that does happen then I guess we see A14 vs 14A-E products in 2028. Then in 2029 TSMC A12 vs intel 10A? The whole thing feels reminiscent of the constant innovation and one-ups-manship that happened with jet aircraft between the USA and the USSR.
 
Last edited:
They were also beat intel to DUV-immersion. TSMC always seemed to love being on the cutting edge of equipment, meanwhile intel was always trying to squeeze out every last mile of their existing tooling.
Is TSMC's first-generation N7 also considered as pushing the limits of DUV?
 
Is TSMC's first-generation N7 also considered as pushing the limits of DUV?
I guess? I think a more correct way to word the question would be did TSMC pushed the limits of DUV-SALELE with N7? Which is a resounding yes. If we are just talking what you can achieve with DUV in general, I think what Micron is doing on 1-beta DRAM is more impressive to me.
TSMC benefited from their relationship with ASML for this. Intel was more of a Nikon house.
That certainly didn’t hurt. I think there were two bigger factors at play though. One intel was taking alot of process risk on the transistor, so if you want a predictable cadence you need to reduce risk in other places. Running so far ahead of the rest of the industry and living in their own isolated world likely amplified that. Factor two was their wafer mix requiring fabs to convert to newer processes every 4-6 years. By dragging as much of this old equipment along with you as possible you can see some of the goodness TSMC sees on their legacy fabs on your bleeding edge wafers.
 
They were also beat intel to DUV-immersion. TSMC always seemed to love being on the cutting edge of equipment, meanwhile intel was always trying to squeeze out every last mile of their existing tooling.

I don't think it is too soon to make that call. From a pure technology perspective TSMC's SPR is objectively more advanced. Direct BS-contact vs the nanoTSVs intel showed off on intel 4+powervia. There should be less R, C, and in theory you can shrink the cell boundaries more. As for implementation intel objectively has the lead over TSMC on this one. TSMC is using the same standard cells with SPR seemingly being for a lack of better words "bolted on". Per TSMC they say the density improvements are from increased utilization on designs limited by their PDNs. Intel on the other hand didn't really have to make a trade-off for DR compatibility by only supporting BSPD. Thus they reduced FS metal tracks and also relaxed MMP giving an areal cost improvement over a hypothetical FS-PDN 18A in addition to the power-performance improvement BSPD gives you.

Either way you are for sure right on the TTM aspect. Things are kind of weird with intel and TSMC being offset. 18A products in 2025 vs N2 products in 2026. If intel achieves 14A 2yrs after 18A, then 2027 should have A16 and 14A products launching side by side. After that maybe we see a BSP only A14 which is an extension of N2/A16 but moves from 6 M0 tracks to 5T or maybe even 4T with a second mint layer like in the recent IMEC paper? If that does happen then I guess we see A14 vs 14A-E products in 2028. Then in 2029 TSMC A12 vs intel 10A? The whole thing feels reminiscent of the constant innovation and one-ups-manship that happened with jet aircraft between the USA and the USSR.

TSMC said A16 production would start in the second half of 2026, which means Apple. TSMC N2 designs are taping-out now and will start production in the second half of 2025. These are complex SoCs not chiplets.

When will Intel 18A based products be available to consumers?
 
TSMC said A16 production would start in the second half of 2026, which means Apple. TSMC N2 designs are taping-out now and will start production in the second half of 2025. These are complex SoCs not chiplets.

When will Intel 18A based products be available to consumers?
This is my point exactly. If everything is on time, 18A products will launch end of Q2 2025. server products are always slow ramp. So it would be Panther lake. We would have Laptops based on Panther lake in July 2025. Intel external foundry product would be the year after per Intel strategy. TSMC was given a challenge and pulled everything in.

If Intel gets ES out on Panther Lake now and is running the production stepping in fab in January, they could hit June Launch. Launch should mean end products for sale. We will see if this holds for Lunar and Arrow lake and then Panther lake
 
TSMC said A16 production would start in the second half of 2026, which means Apple.
I know.
TSMC N2 designs are taping-out now and will start production in the second half of 2025.
Yes TSMC has said as much. I don't think that changes my statement though. TSMC starting production doesn't mean products on store shelves, nor does it mean production wafers leaving the fab, it means exactly what it says on the tin (starting the silicon that will actually make it's way onto store shelves). TSMC said that N5 started volume production in early 2020, N3 started production at the very end of 2022, and that N3E started production in late 2023. Why would we suddenly assume that now on N2/A16 that production in late 2025 and 2026 means products on store shelves in late Q3 2025/2026 respectively?
These are complex SoCs not chiplets.
How would you personally define that?
Does something with DDR and other interfaces count as a complex chip?
Does the die size need to be above some threshold?
Does there need to be a more than one type of xPU on the same die (eg CPU+GPU)?

I don't think any sane person would disagree with you that Meteor lake's cpu tile is less complex than A17 pro. But it is also true that Apple SOCs lack things such as modems, MIM caps, metal depop, etc. Meanwhile if you crack open a MTK or QCOM N7 chip you will find on die modems rather than just a separate chipset on the board and excess metal is depopulated. Pop open an AMD or NVIDIA GPU or an AMD CCD/mobile SOC and you will find metal depop, the HPC tuned Xtors, and TSMC's densest MIM cap.
When will Intel 18A based products be available to consumers?
Intel claims the lead product clearwater forrest will launch in 2025. They also claim that Panther lake SOCs will launch in 2025.
This is my point exactly. If everything is on time, 18A products will launch end of Q2 2025. server products are always slow ramp. So it would be Panther lake. We would have Laptops based on Panther lake in July 2025. Intel external foundry product would be the year after per Intel strategy.
I don't think intel has ever launched a laptop chip in July. ICL was Sept, TGL was Sept, ADL/RPL desktop was in Oct/Nov with laptops coming in January. I don't think intel has said when LNL will come. If prior tendencies hold then I guess laptop only chip designs launch around Sept, and desktop chips launch in fall.
TSMC was given a challenge and pulled everything in.
Besides speculating that maybe A16 would never have existed or that it wouldn't be coming as soon as it is if it wasn't for intel's early BSPDN play, what pray-tell has been pulled in? TSMC has from the beginning said that N2 will be in production in late 2025. TSMC claims to be at or ahead of schedule on all metrics (which is good). But that doesn't mean things can be pulled in because at the end of the day they are subject to Apple's schedule.
 
@nghanayem
I am going with Intels commitment to launch first 18A product in 2Q of 2025 (Manufacturing ready in 2H 2024) and answering Dans question. Will Intel Launch 18A in 2Q 2025 as committed? or will Panther lake be later? you tell me when 18A will launch (ie be available in products)

I was under the impression that people believed TSMC was not going to use N2 in 2025 and that People believed N2 was for 2026 products. If TSMC planned to use N2 in production in 2025 all along, then there was no pull in... you are correct.

Intel said 20A is manufacturing ready in 1H2024, 18A manufacturing ready in 2H2024. Not sure what the update will be next week.

When (what year) will Intel have a manufacturing Fab (not D1x) shipping 20A or 18A wafers?
Do you think we will have Intel end products on 18A before or after we have TSMC end products on N2?

thanks
 
@nghanayem
I am going with Intels commitment to launch first 18A product in 2Q of 2025 (Manufacturing ready in 2H 2024) and answering Dans question.
If we want to be precise, the deadline is in July since that is when intel started talking about 5N4Y. Although funnily enough the 5 nodes were 10SF, i7, i4, i3, 20A. With 18A being something that was briefly mentioned as a later in 2025 thing. Of course for most of the past 3 years intel has been talking about 18A as the final of the 5N4Y, so personally I go with products in customer hands by whatever date in July intel accelerated happened on as intel's deliverable.
Will Intel Launch 18A in 2Q 2025 as committed? or will Panther lake be later? you tell me when 18A will launch (ie be available in products)
I literally just posted that intel said clearwater forest is the lead product not panther lake. Officially all intel has claimed with CWF is "in 2025".
I was under the impression that people believed TSMC was not going to use N2 in 2025 and that People believed N2 was for 2026 products. If TSMC planned to use N2 in production in 2025 all along, then there was no pull in... you are correct.
Correct they never claimed HVM start in 2026. You might just be thinking of their statement that they expected first revenue in late Q1 or early Q2 2026.
Intel said 20A is manufacturing ready in 1H2024, 18A manufacturing ready in 2H2024. Not sure what the update will be next week.

When (what year) will Intel have a manufacturing Fab (not D1x) shipping 20A or 18A wafers?
1722053446704.png


Intel announced Fab 34 fully operational in like early Q4 then intel announced first MTL shipments from Fab34 were in Jan 2024. Around Jan 2024 intel also said fab 9 was up. With this information, the bars seem pretty accurate to the actual schedule with middle of the number being the begging of that year. Therefore Fab52 should be up and humming by mid 2025. So assuming the manufacturing flow isn't crazy longer than intel 4, first product shipments either at the end of 2025 or beginning of 2026.
Do you think we will have Intel end products on 18A before or after we have TSMC end products on N2?


thanks
If intel delivers to their roadmap easily before N2 product shipments. Even if first products don't come out until December intel will have products on shelves around 2Q before TSMC (since first production wafers for revenue are in late Q1, so late Q2 Mx series SOC is the absolute earliest N2 can hit the market and that is with air shipping iPads from from Foxconn). Absolute "worst case" for TSMC (and I use quotation marks because it doesn't really matter to TSMC how many months 18A leads N2) is over a year ahead assuming intel ships 18A anything before September and if TSMC's lead product is the iPhone and not the iPad.
 
I think intel 18A is going to launch product in July 25 based on Intel 3 and Sierra Forest which were HVM ready H2 23 same as 18A H2 24 sierra forest is lead Intel 3 while Clearwater Forest is lead 18A that's what i think i may be wrong though
 
I know.

Yes TSMC has said as much. I don't think that changes my statement though. TSMC starting production doesn't mean products on store shelves, nor does it mean production wafers leaving the fab, it means exactly what it says on the tin (starting the silicon that will actually make it's way onto store shelves). TSMC said that N5 started volume production in early 2020, N3 started production at the very end of 2022, and that N3E started production in late 2023. Why would we suddenly assume that now on N2/A16 that production in late 2025 and 2026 means products on store shelves in late Q3 2025/2026 respectively?

Last year Apple split the phones between the iPhone 15 Pro using an N3 SoC and the iPhone 15 using an N4 SoC. This is the first time I remember them doing that except with the iPhone 6+ when they split the phones between TSMC N16 and Samsung 14nm. They could not get enough N16 wafers and I was told the same thing with N3 wafers in 2023. This year the iPhones should be all N3 but next year Apple could split them between N3 and N2. That would be something. I would pay more for an N2 based phone, absolutely. 😂 Or they could use N2 on iPads or MACs. Either way, you can bet Apple and TSMC want to be first.
 
Back
Top