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TSMC Introduces Foundry 2.0

Daniel Nenni

Admin
Staff member
From the Investor call:

CC Wei:

Thank you, Wendell. Good afternoon, everyone. First, let me start with our near-term demand outlook.

We concluded our second quarter with revenue of U.S. dollar $20.8 billion, above our guidance in U.S. dollar terms. Our business in the second quarter was supported by strong demand for our industry-leading 3-nanometer and 5-nanometer technologies, particularly offset by continuous smartphone seasonalities.

Moving into third quarter 2024, we expect our business to be supported by strong smartphone and AI-related demand for our leading-edge process technologies. Looking at the full year 2024, we forecast the overall semiconductor market excluding memory to increase by about 10%, which is unchanged from our forecast three months ago. At this time, we would like to expand our original definition of foundry industry to Foundry 2.0, which also includes packaging, testing, mask making, and others and all IDM, excluding memory manufacturing.

We believe this new definition better reflects TSMC's expanding addressable market opportunities in the future. However, I want to emphasize here that TSMC will only focus on the most advanced backend technologies which help our customers in leading-edge products. Under this new definition, the size of the foundry industry was close to $250 billion in 2023, as compared to $115 billion under the previous definition.

With our new definition, we forecast the foundry industry growth to be close to 10% year-over-year in 2024. TSMC's share of the foundry industry, under our new definition, was 28% in 2023, supported by our strong technology leadership and broader customer base, we expect this one to further increase in 2024. Over the past three months, we have observed strong AI and high-end smartphone related demand from our customers, as compared to three months ago, leading to increasing overall capacity utilization rate for our leading-edge 3-nanometer and 5-nanometer process technologies in the second half of 2024. Thus, we continue to expect 2024 to be a strong growth year for TSMC.

We are raising our four-year guidance and now expect our 2024 revenue to increase slightly above mid-20s percent in US dollar terms. Next, I will talk about TSMC's capacity planning process and investment disciplines. This is important, especially when we have such high forecasted demand from AI related business.

TSMC's mission is to be the trusted technology and capacity provider for the global logic IC industry for years to come. The continual surge in AI related demand supports a strong structural demand for energy efficient computing. As a key enabler of AI applications, the value of our technology position is increasing as customers rely on TSMC to provide the most advanced process and packaging technology at scale in the most efficient and cost-effective manner.

As such, TSMC employs a disciplined framework to address the structural increase in the long-term market demand profile underpinned by the industry megatrend of AI, HPC, and 5G. We work closely with our customers to plan our capacity. We also have a rigorous and roll-out system that evaluates and judges market demand from both a top-down and a bottom-up approach to determine the appropriate capacity to build.

Our capital investment decisions are based on four disciplines, that is, technology leadership, flexible and responsive manufacturing, retaining customers' trust, and earning a sustainable and healthy return. To ensure a proper return from our investment, both pricing and cost are important. TSMC's pricing strategy is strategic, not opportunistic to reflect the value that we provide.

Today, we are investing heavily in leading-edge specialty and advanced packaging technologies to support our customers' growth and enable their success. If customers do well, TSMC should do well. For example, we are happy to see many of our customers' structural profitability improving in these past few years. At the same time, we face rising cost challenges due to increasing process complexity, a leading load, higher electricity costs in Taiwan, global fiber expansion in higher cost regions, and other cost inflation challenges. Therefore, we will continue to work closely with our customers to share our value. We will also work diligently with our suppliers to deliver on cost performance.

We believe such actions will help TSMC earn a sustainable and healthy return, so that we can continue to invest in technology and capacity to support our customers' growth and fulfill our mission as a trusted foundry partner, while delivering profitable growth for our shareholders.

Finally, I'll talk about our N2 status and A16 introduction. Our 2-nanometer and A16 technologies lead the industry in addressing the insatiable need for energy-efficient computing, and almost all the AI innovators are working with TSMC.

We expect the number of the new tape-outs for 2-nanometer technologies in its first two years to be higher than both 3-nanometer and 5-nanometer in their first two years. N2 will deliver full load performance and power benefit, with 10 to 15 speed improvement at the same power, or 25% to 30% power improvement at the same speed, and more than 15% chip density increase as compared with the N3E.

N2 technology development is progressing well, with device performance and yield on track or ahead of plan. N2 is on track for volume production in 2025 with a ramp profile similar to N3. With our strategy of continuous enhancement, we also introduce N2P as an extension of our N2 family. N2P features a further 5% performance at the same power or 5% to 10% power benefit at the same speed on top of N2. N2P will support both smartphone and HPC applications, and volume production is scheduled for the second half of 2026. We also introduce A16 as our next nanosheet-based technology, featuring Super Power Rail, or SPR, as a separate offering.

TSMC's SPR is an innovative, best-in-class backside power delivery solution that is forcing the industry to incorporate another backside contact scheme to preserve gate density and device with flexibility. Compared with N2P, A16 provides a further 8% to 10% speed improvement at the same power, or 15% to 20% power improvement at the same speed, and additional 7% to 10% chip density gain. A16 is best suited for specific HPC products with complex signal routes and dense power delivery network.

Volume production is scheduled for the second half of 2026. We believe N2, N2P, A16, and its derivative will further extend our technology leadership position and enable TSMC to capture the growth opportunities way into the future.

This concludes our key message, and thank you for your attention.
 
Jeff Su
Okay, Charles. So Charles first question is really look at our conversion strategy. He notes that we have always talked about building in tool commonality to provide us flexibility. We have done so in the past that certain nodes like 20 and 16, 10 and 7. So his question is really we had said that we potentially convert more N5 tools to support the strong demand for N3 capacity. So his question is should we, investors, and we'll start to think about N5 and N3 as one big node?

Wendell Huang
Right. You mentioned about 12 and 16, they are a big foundry. 7 and 10 are a big family. But 5 and 3 are not a big family in our definitions. At the same time, there are node-to-node two commonality in TSMC is pretty high. So for 5 and 3, the commonality of tools is over 90%, and these two nodes are adjacent. They're all in Tainan Science Park. And so it's very easy to do the conversions. Did I answer your questions?
 
On packaging:

C. C. Wei
Gokul, I also try to reach the supply and demand balance, but I cannot today. The demand is so high, I have to work very hard to meet my customers' demand. We continue to increase, I hope sometime in 2025 or 2026 I can reach the balance. You're talking about the CAGR or those kind of increase of the CoWoS capacity. Now it's out of my mind. We continue to increase whatever, wherever, whenever I can. Okay. The supply continues to be very tight, all the way through probably 2025 and I hope it can be eased in 2026. That's today's situation.

The last time I said that, this year I doubled it, right? More than double. Okay. So next year, if I say double, probably I will answer your question again next year and say more than double. We are working very hard, as I said. Wherever we can, whenever we can.
 
Wendell Huang
Now, let's move on to revenue by technology. 3-nanometer process technology contributed 15% of wafer revenue in the second quarter, while 5-nanometer and 7-nanometer accounted for 35% and 17% respectively. Advanced technology, defined as 7-nanometer and below, accounted for 67% of wafer revenue. Moving on to revenue contribution by platform, HPC increased 28% quarter-over-quarter to account for 52% of our second quarter revenue, surpassing 50% for the first time. Smartphone decreased 1% to account for 33%. IoT increased 6% to account for 6%. Automotive increased 5% to account for 5%, and DCE increased 20% to account for 2%.
 
Given those comments it seems possible that TSMC will have 3-5x the number of 2nm wafers running per month compared to Intel (20A/18A) at the end of 2025. Will Intel have Fab52 shipping production wafers at that time? or will it still just be D1?

I think we should boycott any company using the term "2.0" to reflect dramatic changes in business model.
 
Given those comments it seems possible that TSMC will have 3-5x the number of 2nm wafers running per month compared to Intel (20A/18A) at the end of 2025. Will Intel have Fab52 shipping production wafers at that time? or will it still just be D1?

I think we should boycott any company using the term "2.0" to reflect dramatic changes in business model.

I really do think Foundry 2.0 is CC Wei poking fun at Intel.
 
TSMC Foundry 2.0.jpg


 
Given those comments it seems possible that TSMC will have 3-5x the number of 2nm wafers running per month compared to Intel (20A/18A) at the end of 2025. Will Intel have Fab52 shipping production wafers at that time? or will it still just be D1?

I think we should boycott any company using the term "2.0" to reflect dramatic changes in business model.

Is it OK to call "Foundry X" instead? It seems cool too. :)
 
I think the Foundry 2.0 is to correct the market share to include business tsmc invests and serves and to avoid potential anti-trust issue. Currently, tsmc's masking house, packaging and testing facilities serve its foundry products and work in-house only. To becomes Foundry 2.0, I just wondering: will tsmc open the services of mask tooling, package and testing to its competitors? Or just tactically open to “selected” customers?
 
Any monkey can see that their dominance of leading edge silicon is unchanged and growing. To think they can market something else is ridiculous. A pig is a pig and you can’t as they say slap lipstick on it and call it anything but the pig it is. The world still relies on TSMC for everything and China knows and will only tolerate it to a point if this technology war continues to escalate
 
https://techovedas.com/what-is-tsmc-foundry-2-0-why-tsmc-is-changing-its-path/

They coming for everyones food!

Dunno if this article accurate , but it seems like TSMC looking to play with numbers

Foundry 2.0 is just branding:


In regards to Techovedas, do you trust a faceless news site that uses a gmail business email account? Everything is written by Editorial Staff?
 
Foundry 2.0 is just branding:


In regards to Techovedas, do you trust a faceless news site that uses a gmail business email account? Everything is written by Editorial Staff?

As I said previous, these articles just appear in my semicon news feed , I just work in one area of Semicon and any news that could have impact on where I work I try and read what is said.

Are TSMC under pressure from any regulators due high market share where they operate?
 
As I said previous, these articles just appear in my semicon news feed , I just work in one area of Semicon and any news that could have impact on where I work I try and read what is said.

Are TSMC under pressure from any regulators due high market share where they operate?
Unless they planned to buy another foundry or do something anti competitive, then no. This also doesn't change the TSMC's revenue or anything. They are basically just pointing out to investors that they do more than wafers at this point because fabless firms are starting to want advanced package test. I don't think anyone would start including OSATs in the mix of foundries from this announcement given that they don't do wafers, and even if you did it wouldn't really change TSMC's share of the overall market since OSATs are comparatively much lower value than wafer fabs.
 
Unless they planned to buy another foundry or do something anti competitive, then no. This also doesn't change the TSMC's revenue or anything. They are basically just pointing out to investors that they do more than wafers at this point because fabless firms are starting to want advanced package test. I don't think anyone would start including OSATs in the mix of foundries from this announcement given that they don't do wafers, and even if you did it wouldn't really change TSMC's share of the overall market since OSATs are comparatively much lower value than wafer fabs.

The OSAT debated with tsmc had happened decades ago and the argument was did tsmc want to jump into low GM/OM market in OSAT? Eventually 10-20 years effort bears fruits.
AFAIK, tsmc has planned anti-trust countermeasures for years also. I would say CC is smart to count in mask tooling/packaging and testing to dilute current market share of actual SAM. The missing part is there are some IP and design service NRE which do not add-on, but it might not weight too much.
 
The OSAT debated with tsmc had happened decades ago and the argument was did tsmc want to jump into low GM/OM market in OSAT? Eventually 10-20 years effort bears fruits.
AFAIK, tsmc has planned anti-trust countermeasures for years also. I would say CC is smart to count in mask tooling/packaging and testing to dilute current market share of actual SAM. The missing part is there are some IP and design service NRE which do not add-on, but it might not weight too much.

It was quite the debate as I remember. This was back when the other foundries copied TSMC and took away quite a bit of business and OSATs were not good at keeping secrets. Now TSMC is very good at protecting their IP, absolutely.
 
I've been reading "Marketing High Technology: An Insider's View"*, and while I think TSMC is a lot smarter than this, there is an argument that TSMC by rolling out it's own "Foundry 2.0", they're falling into a marketing trap laid by Intel.

In Operation Crush, Intel put out a spectacular looking (but desperately conceived) roadmap (among other efforts), and Motorola responded with their own roadmap that didn't look as impressive and was actually rushed. In short, in undermined Motorola's credibility despite the buzz of the press, media, and customers being strongly in their favor. (Note: TSMC has extremely complete products (except integrating chips from other fabs), which was another major weak spot of Motorola that Intel exploited).

Now, I don't see TSMC getting upset this decade by Intel's foundry efforts but just interesting to watch Intel vs. TSMC unfold. Intel was the first to announce the "Angstrom era", and TSMC later updated their roadmap with "A" products. Now it's Foundry 2.0. Oh, and High NA is coming later at TSMC. These may be shrewd planning on TSMC's part or weak spots in the armor.

..

*A big Thank you to whomever on here recommended the book -- getting the inside story on Operation Crush vs. Motorola alone was excellent.
 
In Operation Crush, Intel put out a spectacular looking (but desperately conceived) roadmap (among other efforts), and Motorola responded with their own roadmap that didn't look as impressive and was actually rushed. In short, in undermined Motorola's credibility despite the buzz of the press, media, and customers being strongly in their favor. (Note: TSMC has extremely complete products (except integrating chips from other fabs), which was another major weak spot of Motorola that Intel exploited).

In my understanding, TSMC made the decision not to integrate other foundry chiplets in their packaging due to the current shortage of packaging. It was not a technical decision, purely business which I agree with. Will they open up their packaging to other die in the future? I don't see how they cannot and remain competitive once the tidal wave of chiplets begin.

AMD may already be working with TSMC on integrating legacy GF die into their current products, according to hallway rumors of course.
 
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