Benefit to customer/fab: Unclutter the routing. Stiffer supplies. Fewer supply pads.
Inductors: Nice cherry pick! Of course our optimizer can't do the sizing of inductors (we can make the touchstone=> netlist for converting to transient runs), but how about the rest of the design, like ADCs, phase detectors, charge pumps, etc? We can migrate, then tune individually.
Let's migrate your stuff to the next process node!
Those are "nice-to-haves" -- real
benefits mean cheaper, or lower power, or faster, or reduced TTM.
Will it be cheaper than standard 12nm/16nm? No, probably more expensive
-- die might be a bit smaller but wafer cost increase is likely to outweigh this. Does it gain a bit of power/speed? Possibly, but see below...
If you want to improve PPA or cost or TTM, 7nm will usually be cheaper for a given function than 12nm with BSPDN, and considerably lower power, and faster, and has a huge IP library, and already exists and is qualified
If you were Apple and went to a foundry said "If you add BSPDN to 12nm I'll bring you $1B of business that you wouldn't get otherwise
" then it might happen. But if the reality was "It'll make my life a bit easier if you spend a lot of effort and money doing this for no extra money for the same business that you'd otherwise get in a different process", it wouldn't even happen for Apple.
But then if your business was big enough to "move the needle" and get a foundry interested, by definition it's big enough that the higher NRE of 7nm can be ignored in favour of smaller die size (lower cost) -- so why use 12nm with BSPDN?
Simple analogue stuff can be automatically ported, but in our experience (on our circuits!) the majority of the analog/mixed-signal design/layout effort goes into the difficult stuff which is *very* hard to port automatically. Your designs may be different, but don't assume that because auto-porting works for you it will work for everyone... ;-)
(FYI I've been looking at analogue synthesis/autoporting for more than 30 years, and we still don't use it...)