The Intel (INTC) CEO Pat Gelsinger on Q1 2021 Results Discussion

[Daniel Nenni]

For those of you who had questions about Intel's datacenter numbers:

After Intel said data-center sales dropped because cloud customers were pausing sales, AMD reports that its sales doubled — a big sign that long-awaited competition is here

Intel's data-center customers may be 'digesting,' but AMD's buffet is wide open

Advanced Micro Devices Inc.'s data-center business is not having any of the digestion issues that Intel discussed last week, leaving investors with the...

www.marketwatch.com

 

[hist78]

For those of you who had questions about Intel's datacenter numbers:

After Intel said data-center sales dropped because cloud customers were pausing sales, AMD reports that its sales doubled — a big sign that long-awaited competition is here

Intel's data-center customers may be 'digesting,' but AMD's buffet is wide open

Advanced Micro Devices Inc.'s data-center business is not having any of the digestion issues that Intel discussed last week, leaving investors with the...

www.marketwatch.com

It's a tragic event that market needs to find out what exactly Intel was talking about from the AMD's quarterly earnings call.

 

[Portland]

I assume 10 nm Xeon is selling out but have yield issues.

Intel's datacenter microprocessor project head left for a Google datacenter microprocessor startup. Someone moving downward willingly is another troubling sign.

 

[Sunit Rikhi]

Here I want to give an explanation of the emergence of the word Tape-in in the Intel lexicon. As Daniel has noted, there has been the concept of tapeout since the beginning of time. Tapeout was the final act of design teams. It represented verifying the data to manufacturing rules, massaging the data to mask making specifications and shipping it to manufacturing (on a magnetic tape).

Over time though, lithography became more and more complicated. Design data needed to go through complex massaging to co-optimize Lithography, Resolution Enhancement Technologies (earlier known as OPC) and Mask Making. It became impossible for the manufacturing group to just specify this data massaging and have the design team do the massaging before sending them the data. Therefore the tapeout function moved from the design domain to the manufacturing domain. Now, when design teams submit data to manufacturing, manufacturing performs the tapeout process to massage the data before committing it to mask making. Data Submission from design to manufacturing changed its name to "Tape-in" some 20 years ago.

Happy tape-in parties. Hope this clarifies the historic root of Pat's use of the word.

 

[count]

Here I want to give an explanation of the emergence of the word Tape-in in the Intel lexicon. As Daniel has noted, there has been the concept of tapeout since the beginning of time. Tapeout was the final act of design teams. It represented verifying the data to manufacturing rules, massaging the data to mask making specifications and shipping it to manufacturing (on a magnetic tape).

Over time though, lithography became more and more complicated. Design data needed to go through complex massaging to co-optimize Lithography, Resolution Enhancement Technologies (earlier known as OPC) and Mask Making. It became impossible for the manufacturing group to just specify this data massaging and have the design team do the massaging before sending them the data. Therefore the tapeout function moved from the design domain to the manufacturing domain. Now, when design teams submit data to manufacturing, manufacturing performs the tapeout process to massage the data before committing it to mask making. Data Submission from design to manufacturing changed its name to "Tape-in" some 20 years ago.

Happy tape-in parties. Hope this clarifies the historic root of Pat's use of the word.

So are you saying that in Intel lexicon tape out is is a design is fully validated by manufacturing and ready for production, and tape in is an earlier step where a design is initially submitted from design to manufacturing for validation?

Would this suggest that a taped out design is ready for manufacturing, vs a taped in design which is not quite ready and may need to go through some additional massaging and validation?

 

[Sunit Rikhi]

So are you saying that in Intel lexicon tape out is is a design is fully validated by manufacturing and ready for production, and tape in is an earlier step where a design is initially submitted from design to manufacturing for validation?

Would this suggest that a taped out design is ready for manufacturing, vs a taped in design which is not quite ready and may need to go through some additional massaging and validation?

Hi count, thanks for trying to digest my comment. Your questions are good and I hope what I say below throws enough light to address them.

Let us start with the handoff from design to manufacturing. The hand-off is called tape-in. Before the hand-off, it is the responsibility of design to fully verify compliance of their physical polygon drawings to technology rules which include lithography rules. Once the design team runs (and iterates with error fixes), the Design Rule verification algorithms (supplied by Technology Development and run on industry EDA tools), then they are ready to hand-off and the hand-off is called tape-in. There is no expectation that it is an "initial design" and not necessarily ready for manufacturing. It is a one way hand-off of a fully verified design (unless there is a new discovery of physics effects that cannot be solved by manufacturing by itself).

Look at it this way:

1) Manufacturing starts at the point of Tape-in.

2) The first manufacturing step is a "data manipulation" step. This data manipulation step is designed to algorithmically distort the data so that when we actually print the design on the wafer, it is as close to the intended shape as needed. This discipline was born around 2002 (just when we entered the sub-100nm ML nodes) and it was called Optical Proximity Correction (OPC). It is now called Reticle Enhancement Technology. Note the word Correction - as in - pre-distortion of the design so that the effects of the limitation of photolithography equipment and chemistry can be negated. OPC algorithms are supplied by Technology Development team which is also responsible for defining lithography design rules. Nowadays, the correction is so intense that if a designer was to look at the corrected data, he or she will not be able to recognize the design.

We call this first step tape-out which begins as soon as tape-in happens. The reason for choosing this name is that there has been a historical tapeout process that used to (in ancient times) "fracture" the design polygons into trapezoids that the mask making machines were able to understand. So in a sense, as we advanced ML nodes, this tapeout process became more and more complex via introduction of OPC algorithms into the process of Data Prep for mask making. At that point, the tapeout group was moved from the design function to the Technology and Manufacturing function. Hence the need for the design teams to name a new hand-off point - Tape-in (so that Tapeout can be started by manufacturing).

I hope this helps
Sunit

 

[Arthur Hanson]

I think they expect the US government to foot the cost of new fabs in the US. They called the $50b the government is planning to spend as a "downpayment". They have pretty much turned into beggers.

Yes, as we know the government record for investing is good, but getting real results or returns isn't. Lately the current administration is calling every expenditure an investment no matter how little sense it makes. Looks like Intel is looking to Uncle Sucker to bail them out.

 

[Sunit Rikhi]

Yes, as we know the government record for investing is good, but getting real results or returns isn't. Lately the current administration is calling every expenditure an investment no matter how little sense it makes. Looks like Intel is looking to Uncle Sucker to bail them out.

At the top of the heep of Intel's current troubles is the loss of technology lead. And that is not due to lack of capital. It is due to results erosion which must be stopped and reversed if Intel wants to bail itself out. Rediscovering the rhythm is what is needed. In the meanwhile, if the government has decided to invest in semiconductors, then Intel seeks its "fair" share which will help tie them over while they rediscover the rhythm. So Arthur, I don't think Intel "needs" the government to bail them out. They need themselves. And that is a tougher problem than that which can be solved with cash infusion.
Sunit

 

[count]

Hi count, thanks for trying to digest my comment. Your questions are good and I hope what I say below throws enough light to address them.

Let us start with the handoff from design to manufacturing. The hand-off is called tape-in. Before the hand-off, it is the responsibility of design to fully verify compliance of their physical polygon drawings to technology rules which include lithography rules. Once the design team runs (and iterates with error fixes), the Design Rule verification algorithms (supplied by Technology Development and run on industry EDA tools), then they are ready to hand-off and the hand-off is called tape-in. There is no expectation that it is an "initial design" and not necessarily ready for manufacturing. It is a one way hand-off of a fully verified design (unless there is a new discovery of physics effects that cannot be solved by manufacturing by itself).

Look at it this way:

1) Manufacturing starts at the point of Tape-in.

2) The first manufacturing step is a "data manipulation" step. This data manipulation step is designed to algorithmically distort the data so that when we actually print the design on the wafer, it is as close to the intended shape as needed. This discipline was born around 2002 (just when we entered the sub-100nm ML nodes) and it was called Optical Proximity Correction (OPC). It is now called Reticle Enhancement Technology. Note the word Correction - as in - pre-distortion of the design so that the effects of the limitation of photolithography equipment and chemistry can be negated. OPC algorithms are supplied by Technology Development team which is also responsible for defining lithography design rules. Nowadays, the correction is so intense that if a designer was to look at the corrected data, he or she will not be able to recognize the design.

We call this first step tape-out which begins as soon as tape-in happens. The reason for choosing this name is that there has been a historical tapeout process that used to (in ancient times) "fracture" the design polygons into trapezoids that the mask making machines were able to understand. So in a sense, as we advanced ML nodes, this tapeout process became more and more complex via introduction of OPC algorithms into the process of Data Prep for mask making. At that point, the tapeout group was moved from the design function to the Technology and Manufacturing function. Hence the need for the design teams to name a new hand-off point - Tape-in (so that Tapeout can be started by manufacturing).

I hope this helps
Sunit

Thanks Sunit,

That is a helpful take.