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TechInsights teardown of Exynos 990 reveals scary Samsung 7nm BEOL

Fred Chen

Moderator
A recent TechInsights article posted a picture of Samsung's 7nm BEOL (from the Exynos 990):
Samsung 7nm 36 nm pitch metal.png


The 36 nm pitch design rules look tighter than on Apple's A15 Bionic (TSMC N5), but the narrow spaces between lines are alarming, definitely vulnerable to stochastic bridging.
 
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Fred Chen

Moderator
Or they got more trick against bridging than others. It would be good to look at, or better probe, their repairable regular pitch structures like SRAM blocks to see how much bridges they have there.
They were still complaining about it in this paper from last year:

 

diediealldie

New member
Or they got more trick against bridging than others. It would be good to look at, or better probe, their repairable regular pitch structures like SRAM blocks to see how much bridges they have there.
Why did they have to make such a thick metal line in the first place? Of course, It's OK as long as it works, but quite interesting. There must be a technological background why Samsung had to do that.
 

Fred Chen

Moderator
Why did they have to make such a thick metal line in the first place? Of course, It's OK as long as it works, but quite interesting. There must be a technological background why Samsung had to do that.
My guess is that they wished to lower the dose (to get enough throughput) by using a wider linewidth.
 

Fred Chen

Moderator
Presume referring to line width being kept larger. Why not the obvious - to reduce line resistance and hence RC issues.
The resistance is inversely proportional to the linewidth, but the capacitance is inversely proportional to the space in between. So the RC is minimized at half the pitch (linewidth = space).
 

Fred Chen

Moderator
Oh never thought that way. I thought photons are simply 'gone' if they contact with photomask absorbers(?)
To avoid the stochastic underexposure, they can either increase the dose or use wider openings on the mask, which passes more light (integrated over area) through the optics to the wafer. But the wider opening actually requires a wider target for better image quality (NILS).
 

John Alderman

New member
Different issues but at these fine dimensions and low voltages is electromigration a consideration for more metal or possible need for via / contact overlap tolerance aided by slightly larger metal to gap an advantage ?
 

benb

Active member
The picture above with a 90%+ density (mostly line, little dielectric) and small pitch (meaning pretty fine lines) is tough to CMP. With less than perfect planarization or overpolish you would erode the dielectric in the dense region. The 90% density appears to be microscopic and local, surrounded by 50% density, so maybe that's why it's doable?
 

Fred Chen

Moderator
Different issues but at these fine dimensions and low voltages is electromigration a consideration for more metal or possible need for via / contact overlap tolerance aided by slightly larger metal to gap an advantage ?
Yes, that would be more of a motivation for widening, for more landing tolerance of possibly wider vias.

It is likely a part of their overall stochastic containment plan. Their paper 113280I in SPIE Advanced Lithography 2020 ("Process related yield risk mitigation with in-design pattern replacement for system ICs manufactured at advanced technology nodes") mentioned that stochastic defects can be mitigated by design improvements such as metal widening, metal spreading, or expanding the via to metal overlap. However, to do this properly, they should have increased the pitch.
 
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