Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/synopsys-custom-compiler-adopted-by-samsung-foundry-to-accelerate-ip-design-for-5lpe-process-technology-with-euv-technology.12121/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Synopsys Custom Compiler Adopted by Samsung Foundry to Accelerate IP Design for 5LPE Process Technology with EUV Technology

Daniel Nenni

Admin
Staff member
Samsung Releases 5LPE AMS Reference Flow Based on Synopsys Custom Design Platform

MOUNTAIN VIEW, Calif., Nov. 18, 2019 /PRNewswire/ --

Highlights:

  • Samsung Foundry has adopted Custom Compiler to its internal IP designers to accelerate design of mixed-signal IP for 5LPE
  • Synopsys Custom Design Platform is the first custom design solution to be supported with an AMS reference flow for the Samsung 5LPE process
  • The 5LPE AMS reference flow improves designer productivity and speeds deployment for 5G, AI, high-performance computing, and automotive applications
Synopsys, Inc. (Nasdaq: SNPS) today announced that Samsung Electronics Co., Ltd., a world leader in advanced semiconductor technology, has adopted the Synopsys Custom Design Platform, based on the Custom Compiler™ design environment, to design IP for its 5-nanometer (nm) Low-Power Early (LPE) process with Extreme Ultraviolet (EUV) lithography technology. To support deployment, an analog/mixed-signal (AMS) reference flow for the platform and a 5LPE interoperable process design kit (iPDK) have been developed and are available now for Samsung Foundry customers. The reference flow fully leverages Custom Compiler's visually-assisted automation technology to improve designer productivity and deliver faster design completion.

"Growing demand for applications such as 5G, AI, high-performance computing, and automotive applications is driving customer adoption of the 5LPE process technology," said Jongshin Shin, vice president of IP Development Team at Samsung Electronics. "To improve designer efficiency for this node, we partnered with Synopsys to develop an AMS reference flow and deployed this flow to our own internal design teams."

The Synopsys Custom Design Platform is the first custom design solution to be supported with an AMS reference flow for Samsung Foundry's 5LPE process. Key features of the Custom Design Platform include reliability-aware verification, Extraction Fusion technology, and visually-assisted layout. Reliability-aware verification ensures robust AMS design with signoff-accurate transistor-level EM/IR analysis, large-scale Monte Carlo simulation, aging analysis, and other verification checks. Extraction Fusion technology with StarRC™ parasitic extraction reduces design closure time by enabling accurate parasitic simulation before layout is complete. Visually-assisted automation is a pioneering approach to reducing layout effort, especially for advanced-node designs, that is proven to deliver higher productivity.

Samsung Foundry has deployed the complete design flow based on the Synopsys Custom Design Platform to its internal IP design teams to accelerate 5LPE IP designs. The same tools are used at Synopsys to design the Synopsys DesignWare® Library, the industry's most widely used, silicon-proven IP, for the Samsung Foundry 5LPE process. Synopsys' Custom Design Platform is based on the Custom Compiler design and layout environment and includes HSPICE®, FineSim® SPICE, and CustomSim™ FastSPICE circuit simulation, Custom WaveView™ waveform display, StarRC parasitic extraction, and IC Validator physical verification.

The 5LPE reference flow includes a set of tutorials that illustrate using the Synopsys Custom Platform to achieve key requirements of 5nm design and layout. These tutorials include sample design data and step-by-step instructions for performing typical design and layout tasks. Tasks covered include:

  • Design entry
  • Circuit simulation
  • Reliability and variability analysis
  • Transient noise analysis
  • RF simulation
  • Schematic-driven layout
  • Dummy fill and coloring
  • Signoff DRC and LVS
The reference flow is available through the Samsung SAFE™ program, which provides extensively tested process design kits (PDKs) and reference flows (with design methodologies) of Samsung Foundry.

"Customers are moving to Custom Compiler at an accelerated pace, driven by the need to produce results faster than they could with legacy design tools," said Aveek Sarkar, vice president, AMS customer success and product management at Synopsys. "Our collaboration with Samsung enables mutual customers, including Samsung's internal IP developers, to maximize designer productivity and complete designs faster."

For more on the Synopsys Custom Design Platform, visit www.customcompiler.info.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
 
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