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Survey paper on soft-error reliability techniques for PCM and STT-RAM

sparsh

Member
We survey architectural techniques for improving the soft-error reliability of PCM (phase change memory) and STT-RAM (spin transfer torque RAM). We focus on soft-errors, such as resistance drift and write disturbance, in PCM and read disturbance and write failures in STT-RAM.
 

Fred Chen

Moderator
Although you identified some key error mechanisms, the relevance to retention is not included in the discussion. It's pretty important.
 

sparsh

Member
Thanks for your comment. Regarding retention, do you mean "STT-RAM retention failure". Actually, I have not seen many papers on this topic at computer-architectural level of abstraction. So, once there are sufficient number of papers on this topic, a survey can be written
 
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