[content] => 
    [params] => Array
            [0] => /forum/index.php?threads/survey-paper-on-dynamic-branch-predictors.10349/

    [addOns] => Array
            [DL6/MLTP] => 13
            [Hampel/JobRunner] => 1010070
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [ThemeHouse/XLink] => 1000670
            [ThemeHouse/XPress] => 1010392
            [XF] => 2010571
            [XFI] => 1020470
            [vw/vw] => 1214010024

    [wordpress] => /var/www/html

Survey paper on dynamic branch predictors


New member
Branch predictor (BP) is an essential component in modern processors since high BP accuracy can improve performance and reduce energy. However, reducing latency and storage overhead of BP while maintaining high accuracy presents significant challenges.

W present a survey of dynamic branch prediction techniques. This paper will be useful for computer architects, processor designers and researchers. Especially in light of Spectre and Meltdown vulnerabilities, which arise due to speculative execution such as branch prediction, a relook on branch predictors is very important.

The paper is available here (the filesize exceeded 1.91MB limit, so I could not upload the pdf here).


That is a vast paper. I wonder what would happen if the compiler could select the predictor? If we could use various approaches, from annotation of source code to trace directed optimization, to include hints as to what algorithm will work for each branch? Since most archtectures have no room to modify the branches this might involve adding a prefix to the instruction set.

As the branch predictors become more elaborate there must be a tradeoff against simple predictors which may cover more numerous sites without aliasing. Tests on benchmarks have smaller branch sets than typical code. Even with adding tags to try to avoid aliasing I wonder how much the real apps benefit from technizues that work for benchmarks.