SPICE and AMS simulation

[Daniel Payne]

View attachment 222
The EDA vendors have been promoting the co-simulation of SPICE with HDLs: Verilog, SystemVerilog, VHDL, SystemC. The bottleneck to simulation is always the SPICE tool.

I've started a post on the Ultimate SPICE Circuit Simulator and would like to hear your thoughts on how AMS simulation uses SPICE.

 

[hillol]

Daniel, This is very helpful for Analog Design.

Hillol Sarkar

www.ago-inc.com
hillol.sarkar@ago-inc.com

 

[Daniel Payne]

Hillol,

Which HDL is preferred for AMS designs these days?

Is it the HDLs with Analog behavior: Verilog-A, VHDL-AMS

Or is it just a digital HDL with SPICE: Verilog, VHDL

I'm curious to hear about your experience.

At Silicon Compilers in the 80's we used the M language for analog behavioral modeling.

 

[mayank]

Hi Daniel,

It depends on the accuracy needed. For most accurate simulation you need SPICE. However, if the need is to provide fast simulating analog models for digital engineers, their is an option to use wreal models ( I think its variation on verilog or systemverilog) in Cadence Incisive simulator. Wreal simulations run super-fast almost as fast as pure digital simulations and modeling is not very difficult. You work in the same Simvision GUI that you use for digital part of the design.

Regards
Mayank

 

[Daniel Payne]

Mayank,

So wreal works with Verilog-AMS and gives you real numbers, is that your favorite Analog HDL?

What was the learning curve like for you, was it hours, days or weeks?

 

[hillol]

HDL for AMS

Daniel

Analog Design Groups use Spice extensively. Sometime they may use mixed-mode
simulation. We have not seen Verilog-A. Analog circuits are manually done.
People use experience to fine tune the circuits. Nothing has changed.

Yes I remember Silicon Complier and SDL from 1985. I assume you joined Mentor
from SC.

Hillol

Hillol,

Which HDL is preferred for AMS designs these days?

Is it the HDLs with Analog behavior: Verilog-A, VHDL-AMS

Or is it just a digital HDL with SPICE: Verilog, VHDL

I'm curious to hear about your experience.

At Silicon Compilers in the 80's we used the M language for analog behavioral modeling.

 

[vpotanin]

Daniel,

I personally consider Verolog-A as a quite useful tool, especially in such cases when I need to simulate couple of complex blocks together but my real focus is just one, while others shall provide stimuli or receive signals from this one. Most frequently I use ideal ADCs and DACs for controlling trimmings and monitoring digital signals in analog form. Very last versions of A-D and D-A are 30 bit thermometer-to-analog and analog to thermometer converters, which I use for simulating sigma-delta audio DAC pulling into simulation a binary data dumped to a text file from Matlab model of the modulator.

However I very rarely hear that other designers use Verilo-A and wonder if it is really popular among analog IC design community.

BTW, Symcia just announced that their free edition now supports Verilog-A. I thik students (and not only) can play with that.

Vlad.

 

[Daniel Payne]

Vlad,

Thanks for the update on how you use Verilog-A. There certainly are many language choices for AMS simulations (Verilog A, Verilog AMS, VHDL AMS, Matlab, SystemC AMS).

 

[harpoon]

@ vpotanin : Analogue designers use verilog-A all the time ... esp in RF designs.
Just have a look at the abundance of verilog-A code at The Designer's Guide Community - A Resource for Analog, RF, and Mixed-Signal Circuit Designers