Samsung Withdraws Personnel from Taylor Plant Amid 2nm Yield Issues

[Maximus]

Samsung Electronics Withdraws Personnel from Taylor Plant Amid 2nm Yield Issues
Editor Kim Eun-jin 2024.09.11 22:57

Samsung Electronics has decided to withdraw personnel from its Taylor plant due to ongoing issues with the 2nm yield, marking a significant setback in its advanced foundry operations. The decision comes after repeated delays in the mass production timeline, which has now been pushed back from late 2024 to 2026.

The Taylor plant, initially envisioned as a hub for mass production of advanced processes below 4nm, was strategically located to secure clients in the U.S., close to major tech companies. However, despite rapid process development, Samsung faced challenges with the 2nm yield, resulting in lower performance and insufficient mass production capabilities compared to its leading competitor, TSMC.

Samsung's foundry yield is currently below 50%, particularly for processes below 3nm, while TSMC's advanced process yield stands at around 60-70%. This yield gap has widened the market share difference between the two companies to 50.8 percentage points, with TSMC holding 62.3% of the global foundry market in Q2, compared to Samsung's 11.5%.

An industry insider commented, "Samsung's GAA yield is around 10-20%, which is insufficient for both orders and mass production." This low yield has forced Samsung to reconsider its strategy and withdraw personnel from the Taylor plant, leaving only a minimal workforce.

Samsung Electronics had signed a preliminary agreement to receive up to 9 trillion won in subsidies from the U.S. CHIPS Act. However, the prerequisite of plant operation must be met to qualify for these subsidies, putting the agreement at risk due to the current setbacks.

Chairman Lee Jae-yong has personally visited major equipment suppliers like ASML and Zeiss in an effort to find breakthroughs for process and yield improvement. Despite these efforts, no significant achievements have been made, and the timing for redeploying personnel to the Taylor plant remains uncertain.

Experts suggest that Samsung needs to fundamentally strengthen its competitiveness. A semiconductor professor noted, "The pervasive bureaucracy within Samsung, slow decision-making, and low compensation are the main reasons for the decline in foundry competitiveness. The delayed investment timing compared to 20-30 years ago also indicates that the management is not fully aware of the current reality, necessitating a fundamental overhaul of the management system."

The current status of Samsung's advanced foundry operations highlights the challenges the company faces in closing the gap with TSMC. As the global semiconductor market continues to evolve, Samsung's ability to address these issues will be crucial for its future competitiveness and market position.

Samsung Electronics Withdraws Personnel from Taylor Plant Amid 2nm Yield Issues

Samsung Electronics has decided to withdraw personnel from its Taylor plant due to ongoing issues with the 2nm yield, marking a significant setback in its adva

www.businesskorea.co.kr

 

[kevin01]

Samsung Electronics Withdraws Personnel from Taylor Plant Amid 2nm Yield Issues

Samsung Electronics has decided to withdraw personnel from its Taylor plant due to ongoing issues with the 2nm yield, marking a significant setback in its adva

www.businesskorea.co.kr

Samsung Electronics Withdraws Personnel from Taylor Plant Amid 2nm Yield Issues
Editor Kim Eun-jin 2024.09.11 22:57

An industry insider commented, "Samsung's GAA yield is around 10-20%, which is insufficient for both orders and mass production." This low yield has forced Samsung to reconsider its strategy and withdraw personnel from the Taylor plant, leaving only a minimal workforce.

Yikes for 10%-20% yields at Samsung 2nm... On the other hand, tsmc N2 has entered "risk production" stage. Not sure what the critieria was for "risk production" at Tsmc though.

 

[Daniel Nenni]

I'm not sure Samsung is relative at the leading edge anymore. 5nm, 3nm, and now 2nm have all had serious yield problems. 10nm was also a mess. Intel Foundry really needs to step up here. Hopefully 18A and 14A will dominate the NOT TSMC market segment otherwise there will NOT be a NOT TSMC market segment, my opinion.

 

[Maximus]

Yikes for 10%-20% yields at Samsung 2nm... On the other hand, tsmc N2 has entered "risk production" stage. Not sure what the critieria was for "risk production" at Tsmc though.

Reasonable to assume the D0 trend of N2 is similar to N3/N5/N7. The mass production of N2 is scheduled in 2025 H2, so now it’s about -4Q: D0 is around 0.4, close to Pat’s claim on Intel’s 18A recently.

 

[Daniel Nenni]

The TSMC Ecosystem Forum is in two weeks, we will be covering it live so stay tuned. My guess is that N2 will be another big node for TSMC with 18A taking the 2nd sourcing foundry customers from Samsung. It really is a new foundry world order.

Intel may say 18A is ahead of TSMC N2 but that is for internal Intel designs which are chiplets, not full chip foundry customers. Out of the gate TSMC has to roll out a complex SoC for Apple before smaller designs or chiplets start rolling through.

And Intel 18A die will be accompanied by TSMC N3 die which I think will continue since Intel CAPEX and Intel chip ASP is under serious competitive pressures. If the Intel to TSMC die ration is 4:1 then Intel needs significantly less fab capacity, right?

 

[lefty]

Intel may say 18A is ahead of TSMC N2 but that is for internal Intel designs which are chiplets, not full chip foundry customers. Out of the gate TSMC has to roll out a complex SoC for Apple before smaller designs or chiplets start rolling through.

Do Intel nodes eventually reach the same yields as TSMC, or do they always stay lower? I mean would Intel 7 now have same yields as TSMC N5?

 

[MKWVentures]

@Daniel Nenni

I think I asked before. My assumption is that people buy wafers with "assumed yields"
1) does TSMC adjust price for low yielding processes? (I do know Samsung had to make some major pricing changes based on poor yields)
2) does customer assume all impact from low yielding products compared to baseline products?

I am guessing GAA and BSP processes will have large product to product variation

 

[nghanayem]

View attachment 2272
Reasonable to assume the D0 trend of N2 is similar to N3/N5/N7. The mass production of N2 is scheduled in 2025 H2, so now it’s about -4Q: D0 is around 0.4, close to Pat’s claim on Intel’s 18A recently.

For some bizarre reason this chart has T=0 set to September 2020 (ie lead product launch rather than HVM start). So on this chart TSMC N2 would be anywhere between T-6Q and T-8Q (my bet is 8Q though for IPhone 18 launch, and no clue if new process will again only be on the pro model and continue trend Apple has been doing). I say this based on TSMC’s statement of first wafers leaving the fab for revenue in Q1’26 or Q2’26. as the longer cycle times force TSMC to start HVM earlier to hit the same final product release date.

Do Intel nodes eventually reach the same yields as TSMC, or do they always stay lower? I mean would Intel 7 now have same yields as TSMC N5?

That is a complex question. For example today 90nm has better yield than intel 90nm did at EOL, however the intel node hasn’t been touched for the better part of two decades. So it makes sense for intel to lag on trailing edge process DD. Conversely intel 14nm almost assuredly had far lower DDs than 10FF because TSMC EOLd the process after like 2-3 years while intel 14 is still in production (albeit with much lower volumes than it used to be). Intel 22nm is famous for having a faster yield ramp than any of the foundry 16/14 processes despite them reusing the 22/20nm BEOLs. TSMC was slower than UMC on 90nm (or maybe it was 65nm), and given how fast the bring up for the intel equivalents were intel almost certainly had a faster yield ramp. TSMC 40 started life off with a lot of struggles on their first strain and immersion implementations compared to intel's flawless rollout of RMG at 45nm. While compared to the not yielding HKMGF folks; TSMC 28nm yield was great. When you look at an RMG vs RMG process, the vibe I got was that it trailed intel 32nm and even 45nm (1st gen RMG AND double patterning). Another data point is that at IFS-DC MTK NA mentioned that intel 16 yield was initially far below their standards for where a legacy node like 16/14nm should be after a decade of HVM. They then went on to say they were really impressed how in less than a year intel raised yield to BIC foundry levels. As for N5 vs i7 I doubt it. Intel 7 has so many more mask layers and even metal layers than N5 HPC. So even if we ignore systemic defect modes, intel’s random DD per layer would need to be far lower than TSMC to have matched defectively on a full chip level. Put another way intel 7 should on paper have a higher DD floor than N5 (just like N7 did vs N5). After 4 years of ultra high volume manufacturing I would expect any fab operator to be pretty close to the asymptotic limit as most of the systemic modes should be eliminated.

 

[Daniel Nenni]

@Daniel Nenni

I think I asked before. My assumption is that people buy wafers with "assumed yields"
1) does TSMC adjust price for low yielding processes? (I do know Samsung had to make some major pricing changes based on poor yields)
2) does customer assume all impact from low yielding products compared to baseline products?

I am guessing GAA and BSP processes will have large product to product variation

It depends on the customer. Early customers assume some yield risk, following customers do not since yield is established. If there is a yield problem a root cause analysis is done and the resulting cost is negotiated based on fault (customer versus foundry). It all depends on the wafer agreement of course. In the past Samsung has resorted to selling good die versus wafers due to bad yield, but again, it was Samsung's fault. I have not seen a recent Samsung FinFET wafer agreement so I do not really know what they do now. I do hear it from the customers and IP companies though and when they are selling good die versus wafers there is a very bad yield problem.

 

[blueone]

Is this article from a credible source? What objective does withdrawing personnel help achieve? Defeat? It makes no sense.

 

[nghanayem]

Is this article from a credible source? What objective does withdrawing personnel help achieve? Defeat? It makes no sense.

Maybe those personal are seeds from Hwaseong that are being withdrawn to add additional hands to fixing the process back at home? After all if the process isn't ready for transfer the seeds would just be sitting around, better to send them to Korea to help where they can. Either way I am somewhat skeptical because mainstream media and process yield is always a dart game of folks who have no clue what they are talking about firing off shots in the dark in the hopes they are right. But in this case it is at least believable since SF2 seems to be an extension on SF3, and even the much improved SF3 still looks really bad (at least in the tear-down of Exynos W1000).

 

[blueone]

Maybe those personal are seeds from Hwaseong that are being withdrawn to add additional hands to fixing the process back at home? After all if the process isn't ready for transfer the seeds would just be sitting around, better to send them to Korea to help where they can. Either way I am somewhat skeptical because mainstream media and process yield is always a dart game of folks who have no clue what they are talking about firing off shots in the dark in the hopes they are right. But in this case it is at least believable since SF2 seems to be an extension on SF3, and even the much improved SF3 still looks really bad (at least in the tear-down of Exynos W1000).

So, if I may reword your guess, these are TD people from Korea being sent back to headquarters to work on fixing the process?

 

[Daniel Nenni]

Follow-up report from Trendforce:

[News] Samsung’s 2nm Yield Rate at Most 20%, Withdraws Personnel from Texas Taylor Plant | TrendForce Insights

While Samsung Electronics is said to be delivering an oversea workforce cut up to 30%, a report from Korean media outlet Business Korea on September 1...

www.trendforce.com

"Reportedly, Samsung’s wafer foundry yield is below 50%, particularly in processes below 3nm, while TSMC’s advanced process yield is around 60-70%. This gap has widened the market share difference between the two companies."

How do they get away with this? Is all of Samsung foundry below 50%? What TSMC advanced processes are they referring to that are 60-70%? N14-N3?

"Samsung Electronics had signed a preliminary agreement to receive up to KRW 9 trillion in subsidies from the U.S. Chips Act. However, a key condition for receiving the funding is that the plant must operate smoothly, and Samsung’s current difficulties put this agreement at risk."

A key condition is running smoothly?

 

[benb]

There is no single word of truth in this businesskorea article. Other than the professor who claimed Samsung has a "pervasive bureaucracy", that is obvious.