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Samsung Reportedly Scrambling To Boost 3nm GAA Chip Yields, Which Are Said To Have 20% Yields

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Will Samsung ever tell the truth about their yields?


The introduction of 3nm GAA technology commenced in 2022 when Samsung stated it had initiated mass production of its cutting-edge manufacturing process, and it would bring a wave of performance and efficiency advantages compared to the company’s 5nm node. Fast-forward to 2024 and almost heading into 2025, the Korean giant is said to be struggling to improve yields and is finding every possible solution to climb out of the hole that it has dug itself into. A report claims that despite a multitude of efforts, the 3nm GAA yields are three times less than the minimum limit required for mass production.

Failure to increase 3nm GAA yields will result in Samsung losing out on AI chip orders, with the likes of Qualcomm likely taking a backseat.

A report from Korea Times mentions that Samsung’s 3nm GAA yields were in the single digits during the first quarter of 2024. Slowly, the company has successfully shown progress, taking that number to 20 percent. Unfortunately, while this is an improvement, Korean analysts estimate that Samsung has to take that figure to 60 percent to start mass production, as its former clients, such as Qualcomm, will start to show faith.

 
In June they were supposedly at 20%, after being outed a few months earlier at being in the single digit yields.

Since June they have made ZERO progress?

Maybe they are really only at 11%, but that's just too embarrassing to admit?
 
The number is meaningless without know what it was. If the product in question was Exynos W1000, then I flat out don't believe the process is that bad. DD would need to be OVER 11 with a die that tiny to be sitting at 20% die yield. Even 9% yield would be at 17.7 DD. The TEMs may have looked really bad, but I have a hard time believing even Samsung would start HVM on Galaxy watch 7 with DDs that horrendous. I could be convinced they were in single digit DD range but with high parametric fallout. But double digit DDs, I would tenitivly file this rumor in the junk category.
1726240805943.png
 
The number is meaningless without know what it was. If the product in question was Exynos W1000, then I flat out don't believe the process is that bad. DD would need to be OVER 11 with a die that tiny to be sitting at 20% die yield.
I would assume they are talking about Exynos 2500 trial yield. Exynos 2500 vs Snapdragon 8 gen 4 has been discussed a lot. In the most recent rumor, Samsung will use 8 gen 4 for all new phones since the yield of Exynos 2500 is too poor.
 
And to think DD 0.4 of 18A is considered bad anyway i agree with you nghanyem i it is not good but without mentioning die it is useless
BTW found this interesting thing on twitter
 

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I would assume they are talking about Exynos 2500 trial yield. Exynos 2500 vs Snapdragon 8 gen 4 has been discussed a lot. In the most recent rumor, Samsung will use 8 gen 4 for all new phones since the yield of Exynos 2500 is too poor.
If the die size of Exynos 2500 is similar to Exynos 2400, 20% yield is obtained when defect density = 1.38
 

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If you choose the wrong architecture and or tools it can be a long slog even for the smartest org. Or if you have a broken culture all the best tools and engineers ain’t going to fix it.

The only question now is what’s going on at Intel and Samsung. We will see about Intel in 2025
 
Tbh nothing Beats 10nms Fiasco nothing and I don't think something ever will
How so? i10nm was originally supposed to come out in 2016. Since 14nm was like 6-9mo late and with a slow initial yield ramp, if you want to be generous to intel maybe you will cut them slack and say 10nm should have come out by 2017. Real HVM for 10nm started in 2019 and icelake feels like it was a higher volume part than broadwell. So at worst i10nm was 3 years late with an okish argument that it was 2 years late. Samsung promised 3nm was going to be launching products in 2022. So Samsung is 2 years late (either not that much earlier or just as late depending on how you want to look at it). W1000 is also 1/7th the diesize of icelake (and the earlier posts showed the huge DD swings to get iso yield as die size grows), and lacks major performance features expected from an actual process technology. It would be like if icelake had no MIM, no strain, and only one Vt. Actually as I type this; scratch that. It is even worse than that. W1000 also doesn't have any of those things besides NMOS strain. If I had to compare the TEMs I saw, I would say W1000 definitely looked worse than icelake. I don't want to say they were comparable to the images I have seen of cannonlake given how grave of an insult that is, but W1000 is certainly closer to that than to icelake. I guess the uniformity and other flaws looking cannonlake-esche kind of lines up, because that cyprto ASIC on 3GAE is actually the worst thing I have ever seen hands down. Like so bad I would bet significant amounts of money that 2023 A16 looked and maybe even A14 (something that is 4-5 years out from launching products) look better than 3GAE did.

TLDR I view them as comparable disasters, and if Exynos 2500 either doesn't come out or is also missing critical requirements like mutiple Vts then I think this is worse than i10nm.
 
How so? i10nm was originally supposed to come out in 2016. Since 14nm was like 6-9mo late and with a slow initial yield ramp, if you want to be generous to intel maybe you will cut them slack and say 10nm should have come out by 2017. Real HVM for 10nm started in 2019 and icelake feels like it was a higher volume part than broadwell. So at worst i10nm was 3 years late with an okish argument that it was 2 years late. Samsung promised 3nm was going to be launching products in 2022. So Samsung is 2 years late (either not that much earlier or just as late depending on how you want to look at it). W1000 is also 1/7th the diesize of icelake (and the earlier posts showed the huge DD swings to get iso yield as die size grows), and lacks major performance features expected from an actual process technology. It would be like if icelake had no MIM, no strain, and only one Vt. Actually as I type this; scratch that. It is even worse than that. W1000 also doesn't have any of those things besides NMOS strain. If I had to compare the TEMs I saw, I would say W1000 definitely looked worse than icelake. I don't want to say they were comparable to the images I have seen of cannonlake given how grave of an insult that is, but W1000 is certainly closer to that than to icelake. I guess the uniformity and other flaws looking cannonlake-esche kind of lines up, because that cyprto ASIC on 3GAE is actually the worst thing I have ever seen hands down. Like so bad I would bet significant amounts of money that 2023 A16 looked and maybe even A14 (something that is 4-5 years out from launching products) look better than 3GAE did.

TLDR I view them as comparable disasters, and if Exynos 2500 either doesn't come out or is also missing critical requirements like mutiple Vts then I think this is worse than i10nm.
Yes but samsung has other buisness to get money from Intel's one and only buisness is semiconductor the whole 10nm together with Skylake cost them Apple as a client and their leadership so the loss is something they are still recovering from and we are getting 10nm++++ from 14nm+++++ i may have misplaced plus cause I don't remember exact count for 14nm 😅 samsung didn't fall from grace as much though IMO
 
If the die size of Exynos 2500 is similar to Exynos 2400, 20% yield is obtained when defect density = 1.38

I suspect, your 137 sq mm die size is closer to reality that nghanayem's 17 sq mm example.

I've read somewhere the Exynos 2500 may be 150 sq mm.

I wonder what the die size was for the recent Broadcom test wafers from Intel, that were apparently not ready for prime time?
 
I've read articles regarding why i10nm failed. It would be interesting to read something detailing why Samsung's hasn't been able to get GAA off the ground. I speculate that they were too ambitious, like Intel was with their original i10nm. They just tried making too many changes at the same time.
 
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