Reviewing the cell heights, it is apparent that Samsung's 5LPE adds a couple more track options to 7LPP but there is no metal or gate pitch shrink. In fact, for 5LPE "HD" is actually widened to 7.5 tracks (from 6.75 for 7LPP), while "UHD" is 6 tracks. It looks like it could be more appropriately named 7LPX (for extra options or enhancements). Interesting that 7LPP cell height is almost the same as but slightly larger than TSMC's 7nm (first version). There doesn't seem to be an actual intention by Samsung to beat TSMC on density. Perhaps TSMC charged too far ahead for 5nm?
Update and analysis of Samsung's upcoming 5-nanometer and 4-nanometer process technologies.
A look at Samsung’s 2nd generation 7nm process that was recently disclosed at the 38th Symposium on VLSI Technology.
Update and analysis of TSMC 7-nanometer node low-power and high-performance cells, 2nd generation 7nm, and the design technology co-optimization (DTCO) effort that went into the Snapdragon 855 SoC.