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Podcast Summary: EP13 - The Three Pillars of Verification with Adnan Hamid

S

Saicharan1919

Guest
This is the summary of the recent podcast "EP13: The Three Pillars of Verification with Adnan Hamid".

Topic: Three important fundamentals of Verification
Guest: Adnan Hamid, founder and CEO of Breker Verification Systems.
Host: Daniel Nenni, Semiwiki

Adnan mentioned three things that affect the business of SoC - quick entry into the market, quality and affordability. He pointed out that the cost of training people is high and hence employing automation in the process will make verification more affordable.

Later, Adnan talked about the SoC verification bottlenecks. "The complexity of verification runs as exponential to the complexity of the design". Writing tests, getting coverage and availability of tests in multiple formats makes SoC verification much harder.

Then, Adnan moves to the concept of three pillars that drive the future of verification -
  • 1. Modelling
  • 2. 3-D Coverage
  • 3. Portability
“The biggest problem in verification is, we are not good about a good algebra to write down what a verification intent is”. “We need to have a single source of truth, that is a flowchart” – Adan. The requirement of a flowchart in the verification is crucial. The steps in the flowchart are applied to the IP model and subsequent IP models are composed into system models. Adani highlights the Portable Stimulus (PSS) language which helps to describe the flowcharts.

Combinatorial coverage, Sequential coverage and concurrency coverage are the three dimensions of the Coverage. Combinatorial coverage gives us the combinatorial state at a particular clock or stage. This is the most common coverage. On top of that, one needs to test all steps in the flow chart. This is known as sequential coverage. Still, one needs to test the concurrent flows in the system. All these coverages are effectively known as 3-D coverage.

Portability is the ability to write the tests. It should be able to manage memory and synchronizing I/O on various platforms. Verification not only include writing test cases but also managing concurrency of memory management and synchronizing I/O. The operations involving all these sequences and concurrency can be synthesized by an SoC verification OS.

Analogous to logic synthesis where one can easily build netlists of new technology from the older ones using tools, one can generate test cases from one model for different IP benches and later compose these individual IP models into an SoC model. These 3 pillars of verification help to achieve this.

Adnan mentions the practical applications of these 3 pillars of SoC verification by talking about the 3 case studies which are mentioned in his website as well. Breker Verification Systems offered synchronization tools to Broadcom for their power management chips. His company also offered planning algorithm-based solutions to test the hardware scheduling in Huawei’s base-band processors. Altera also used their planning app to verify the hard SoCs that are part of their FPGAs.

I tried my best to include everything covered in the discussion.

 
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