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NXE:3400C (EUV) throughput vs. dose

Fred Chen

Moderator
NXE3400C throughput from SPIE 1151712.png

This is based on the recent SPIE paper 1151712: J. van Schoot et al., "High-NA EUV Lithography Exposure Tool: Advantages and Program Progress," Proc. of SPIE vol. 11517, 1151712 (c) 2020 SPIE. The high-NA tool is projected to be a little (~10%) faster for best case, but more so for the slower cases. The slower cases are expected for higher doses, which would be mandated by stochastic defect concerns.
 

Fred Chen

Moderator
The chat doesn't make sense. Is the WPH decreasing with higher dose?
At the low dose, the stage limits the throughput, but at the higher dose, the maximum pulse power limits the throughput, since the higher dose means more mJ/wafer, and the stage has to slow down to accumulate this dose.

ASML plots this independently of source power by taking power/dose as the x-axis. Here power is fixed at 250W, so the x-axis is effectively inverted.
 

Paul2

Active member
At the low dose, the stage limits the throughput, but at the higher dose, the maximum pulse power limits the throughput, since the higher dose means more mJ/wafer, and the stage has to slow down to accumulate this dose.

ASML plots this independently of source power by taking power/dose as the x-axis. Here power is fixed at 250W, so the x-axis is effectively inverted.
Are EUV light sources still stuck at 250W in production?
 

Fred Chen

Moderator
Are EUV light sources still stuck at 250W in production?

Current tool models have 250W, ASML/Cymer and Gigaphoton have been looking at going above 300W. There have been alternative sources considered, like FEL, but not much traction.
 

Fred Chen

Moderator
In SEMICON Taiwan 2020, tsmc Chairman Mark Liu mentioned that there was 350W EUV source power tool available.

I have checked ASML's reports in 2020; they had not mentioned >250W (yet). But for 350 W, the curve would shift to 40% higher dose.
 

Fred Chen

Moderator
Here is the material posted by someone then.
View attachment 352

Ok, thanks. So I checked for a 2019 report of 300W, it was reported by Anthony Yen (ASML) at Semicon West 2019 https://fuse.wikichip.org/news/2550/semicon-west-2019-asml-euv-update/ for the source power demonstrated in ASML's lab, not yet connected to a tool. It will generally be higher than the field tools to show that there is room for improvement. I think this will be traditionally presented this way at Semicon.
 
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