You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
There were some nice renders of Micron's US fab plans. It was also pretty funny (and painful) hearing the explanation of HBM.
As a side note I remember hearing a while ago that Micron JP and Boise do joint DRAM technology development. Does anyone have any idea what that even means. Does one or the other do TD remotely? Or is it similar to my understanding of how TSMC works, where most of the TD is done at Fab12 and then the process gets transferred to HVM_1 where they figure out manufactuability and do the subsequent TD work (With Boise being fab12 and JP being HVM1)?
Former Elpida has TD capabilities similar to Micron. That is what it means, like Intel doing TD in Israel as well as Portland, Micron wisely didn't close down Elpida R&D.
Where did you hear this? I don’t think intel has ever said that logic, memory (RIP), or even packaging TD have ever happened in Israel. The closest I’ve got is I think I remember seeing random people on the internet say that Israel should do TD because Oregon is incompetent during the 10nm delay era. Are you just thinking about the product design/R&D partially being done in Israel along with Cali, Oregon, India, etc?
Where did you hear this? I don’t think intel has ever said that logic, memory (RIP), or even packaging TD have ever happened in Israel. The closest I’ve got is I think I remember seeing random people on the internet say that Israel should do TD because Oregon is incompetent during the 10nm delay era. Are you just thinking about the product design/R&D partially being done in Israel along with Cali, Oregon, India, etc?