Don't miss these exciting Mentor events at this year's conference!
Featured Keynote - Stefan Jockusch - Siemens Digital Industries Software
Driving Digitalization With A Boundary Free Innovation Platform
- Wednesday, September 25th | 11:30 AM - 12:15 PM
- Grand Victoria Ballroom
This digital twin is becoming a necessity. Autonomous driving, as an example, puts an end to the feasibility of verifying the functionality of today's and tomorrow's vehicles through road testing. A complete virtualization of mechanical properties, physics, electronics, real-time software, down to the sensor data processing at the IC level is the only avenue to verify the safety and functionality of advanced driver assistance systems and autonomous functions. In the same way, technologies like additive manufacturing, advanced materials and exploding variation require an extensive virtualization of the production process to accelerate verification.
Next Gen System Design and Verification for Transportation
- Wednesday, September 25th | 4:00 PM - 5:30 PM
- Grand Victoria A
Starting with design, the entrance of machine learning using neural networks and inference solutions has demonstrated the need to quickly develop these highly algorithmic designs. Validation of those algorithms, performance targets, and power consumption demands new solutions that can simulate the complex, heterogeneous systems with real world interactions. Beyond just ensuring the IC operates correctly, functional safety standards, like ISO 26262 for automotive, are enforcing state-of-the-art practices, strict processes and evidence for compliance to ensure the delivered capabilities are functionally safely. The days of separating functional workflow development from the safety workflow has passed. It is imperative that safety be at the forefront when determining the methodologies and tools to deploy in the creation of your transportation application.
The intersection of these challenges is delivering advanced features on-time, within budget all while simultaneously ensuing the IC will not malfunction.
This tutorial we will demonstrate how to use these next-generation IC development practices to build and validate smarter, safer ICs. Specifically, it will look at:
- How to use High-Level Synthesis (HLS) to accelerate the design of smarter IC's
- How to use emulation to provide a digital twin validation platform beyond just the IC
- How to use develop functionally safe IC's
Portable Stimulus: Designing A PSS Reuse Strategy
- Thursday, September 26th | 2:00 PM - 3:30 PM
- Grand Victoria B
Exhibit Hours - Booth #15
- Wednesday, September 25th | 11:00 AM - 6:30 PM
- Thursday, September 26th | 11:00 AM - 5:30 PM
Visit the Mentor Booth #15 at DVCon India 2019!