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Need standards and better apparatus for dopant and carrier profiling at 7-nm node

mhagmann

Member
STANDARDS: The 1997 NTRS roadmap did not mention carrier profiling but suggested that the resolution for dopant profiling be 1.4 % of the node dimension. Now, at the 7-nm node, 1.4% = 0.1 nm. Subsequent national and international roadmaps do not refer to the resolution in either carrier or dopant profiling. The many SEMI standards provide no guidance for either dopant or carrier profiling below the 90-nm node which was introduced in 2004.

METHODS: Dopant profiling verifies the fabrication of a device whereas carrier profiling validates its nanoscale operation. In general, it is preferred to do both to provide a check and also determine the activation of the dopant atoms. Below the 40-nm node carrier profiling is generally done by Scanning Spreading Resistance Microscopy (SSRM) or Scanning Capacitance Microscopy (SCM). Dopant profiling with atomic resolution is possible using Atom Probe Tomography but APT is labor-intensive and destroys the device under test.

The title of one paper on SSRM claims "sub nm resolution" but this is contradicted by an SEM image (Fig. 6b in this paper) showing that the diameter of the probe-sample contact is 20 nm [1]. The resolution with SCM is limited to about 10 nm by the size of the metal probe that is in contact with the required insulating layer [2].

INTERPRETATION: The limitations in these standards and methods are likely to limit the accuracy and precision in defect inspection which could have a strong impact on select rates and process control decisions.

[1] T. Hantschel et al., Microelectron. Eng. 159 (2006) 46-50.
[2] E. Bussmann and C.C. Williams, Rev. Sci. Instrum. 75 (2004) 422-425.
 
The Oct 2nd release "ANSYS Achieves TSMC Certification for 7 nm FinFET ..." stated that TSMC certified the ANSYS solutions for the 7 nanometer FinFET Plus (N7+) process node with extreme ultraviolet lithography. However, please consider the limitations of the present standards and methods for device characterization which I have mentioned because they will limit the accuracy and precision in defect inspection which could have a strong impact on select rates and process control decisions.
 
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