Abstract
Modern technology trends are blurring the lines of applications across market domains, forcing products to address multiple industry features simultaneously. With the increase in automotive infotainment systems, autonomous driving, and vision/lidar systems, we now see a convergence of requirements across consumer electronics, mobile communications, and advanced computing platforms. This convergence brings the need for collective compliance of various interface and IO standards. To address this, SOC architects and designers need to find newer solutions that can provide flexibility to system integrators. To facilitate this, IO Libraries are required to have for have flexibility and easy configurability of interfaces, including adjusting voltages at system level.
Certus Semiconductor has been meeting these market needs by providing extremely flexible and configurable GPIO and ODIO designs, allowing suppliers to meet the needs of multiple ASIC customers as well as system integrators with a highly flexible IO bank usable in a single SoC design. In TSMC 12nm and 16nm, Certus has created a single IO that can meet the needs of over 20 different single-ended and differential IO standards, while providing comprehensive flexibility with power-up, voltage levels and configurations, amidst meeting automotive grade reliability.
A versatile multi-protocol GPIO targeting AEC qualification will be discussed in this presentation. It supports any of the following electrical protocols at any voltage between 1.2V to 1.8V. For single ended operation, it covers LVCMOS, ONFI, eMMc, RGMII, SGMII, SSTL and HSTL class 1,2 and 3 (targeting DDR), HSUL, POD and many others. Differential support is also provisioned for MIPI-D PHY, LVDS, SLVS, differential SSTL/HSTL/HSUL/POD, etc. This design is an evolution of a similar silicon-verified GPIO in TSMC 12nm and 16nm FinFET covering 1.8V to 3.3V. Furthermore, the IO library includes a 5V Open-Drain IO and hot-Plug-Detect in the same TSMC technologies. These IO Libraries are architected with flexible features catered to the automotive world, for example, power sequencing independence, shorted output protection, and in some cases IEC 61000-4-2 system level ESD protection.
Certus Semiconductor utilizes Siemens’ Analog FastSPICE Platform (AFS) for circuit verification and sign-off. With AFS, Certus designers perform comprehensive transient and RF analyses with SPICE accuracy and accelerated performance to meet market demands for their simulation-to-silicon correlated IPs.
Source: TSMC OIP Ecosystem Forum
Link to Press Release
Modern technology trends are blurring the lines of applications across market domains, forcing products to address multiple industry features simultaneously. With the increase in automotive infotainment systems, autonomous driving, and vision/lidar systems, we now see a convergence of requirements across consumer electronics, mobile communications, and advanced computing platforms. This convergence brings the need for collective compliance of various interface and IO standards. To address this, SOC architects and designers need to find newer solutions that can provide flexibility to system integrators. To facilitate this, IO Libraries are required to have for have flexibility and easy configurability of interfaces, including adjusting voltages at system level.
Certus Semiconductor has been meeting these market needs by providing extremely flexible and configurable GPIO and ODIO designs, allowing suppliers to meet the needs of multiple ASIC customers as well as system integrators with a highly flexible IO bank usable in a single SoC design. In TSMC 12nm and 16nm, Certus has created a single IO that can meet the needs of over 20 different single-ended and differential IO standards, while providing comprehensive flexibility with power-up, voltage levels and configurations, amidst meeting automotive grade reliability.
A versatile multi-protocol GPIO targeting AEC qualification will be discussed in this presentation. It supports any of the following electrical protocols at any voltage between 1.2V to 1.8V. For single ended operation, it covers LVCMOS, ONFI, eMMc, RGMII, SGMII, SSTL and HSTL class 1,2 and 3 (targeting DDR), HSUL, POD and many others. Differential support is also provisioned for MIPI-D PHY, LVDS, SLVS, differential SSTL/HSTL/HSUL/POD, etc. This design is an evolution of a similar silicon-verified GPIO in TSMC 12nm and 16nm FinFET covering 1.8V to 3.3V. Furthermore, the IO library includes a 5V Open-Drain IO and hot-Plug-Detect in the same TSMC technologies. These IO Libraries are architected with flexible features catered to the automotive world, for example, power sequencing independence, shorted output protection, and in some cases IEC 61000-4-2 system level ESD protection.
Certus Semiconductor utilizes Siemens’ Analog FastSPICE Platform (AFS) for circuit verification and sign-off. With AFS, Certus designers perform comprehensive transient and RF analyses with SPICE accuracy and accelerated performance to meet market demands for their simulation-to-silicon correlated IPs.
Source: TSMC OIP Ecosystem Forum
Link to Press Release