Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/mixel-announces-immediate-availability-of-mipi-c-phy-d-phy-combo-ip-on-tsmc-n5-process.14639/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on TSMC N5 Process

Daniel Nenni

Admin
Staff member

Mixel’s silicon-proven IP supports the latest versions of the MIPI Specifications for camera and display applications​


SAN JOSE, CA – (BUSINESS WIRE, September 14, 2021) Mixel®, a leading provider of mixed-signal intellectual property (IP), announced today that its MIPI® C-PHYSM/D-PHYSM Combo IP is now available on TSMC’s industry-leading N5 process. The MIPI C-PHY IP supports the v2.0 specification, and the MIPI D-PHY IP supports the MIPI D-PHY v2.5 specification.

Mixel announces immediate availability of silicon-proven MIPI C-PHY/D-PHY Combo IP on TSMC N5 Process, supporting camera and display applications​


Mixel’s MIPI C-PHY/D-PHY combo IP is a high-frequency, low-power, low-cost, physical layer. The MIPI C-PHY IP supports a speed of 4.5 Gsps per trio, an equivalent data rate of 10.26 Gbps/trio, and in MIPI D-PHY mode, the IP supports speeds up to 4.5 Gbps per lane. With up to three trios in C-PHY and up to four lanes in D-PHY, the combo IP reaches an aggregate bandwidth of 30.78 Gbps and 18Gbps in their respective modes.

There are multiple configurations of this combo IP available, including area optimized transmitters or receivers, supporting either the MIPI Camera Serial Interface 2 (CSI-2®) or MIPI Display Serial Interface 2 (DSI-2SM) as well as a universal version of the IP which supports all configurations. In addition, Mixel also offers its patented RX+ and proprietary TX+ versions of its MIPI receiver and transmitter IPs. These unique configurations allow full-speed, in-system testing without the area penalty of a universal configuration and are designed for safety sensitive applications such as automotive, medical, and other use cases where safety and reliability are critical.
Mixel achieved first-time silicon success with the 5nm test chip and is now working on various configurations of the IP.

“Mixel is a valued contributing member and promoter of MIPI Alliance and its specifications for many years,” said Joel Huloux, MIPI Alliance chairman. “We are excited to see Mixel continuing to innovate and push the boundaries of MIPI by making its MIPI C-PHY/D-PHY IP available in the most advanced nodes.”
This combo IP, running at 4.5Gsps, was first announced in September 2020 on TSMC’s 22nm process.

“Mixel has been a long-standing partner of TSMC and has been delivering multiple generations and configurations of their MIPI IP for our mutual customers,” said Suk Lee, Vice President of Design Infrastructure Management Division at TSMC. “We will continue our collaboration with Mixel to enable next-generation silicon designs benefiting from the significant power and performance boost of our N5 process and help our customers quickly launch their new product innovations to market.”

Mixel was the first IP provider to silicon prove the first generation of MIPI C-PHY/D-PHY combo IP in 2016. Mixel’s MIPI PHY IP has been silicon-proven in 9 different processes at TSMC.

“We are excited to announce immediate availability of our silicon-proven MIPI PHY IP for TSMC’s 5nm technology, the most advanced foundry solution available today,” said Ashraf Takla, President and CEO of Mixel. “We have licensed this IP to multiple customers at this and adjacent nodes and continue to focus on expanding our portfolio in the most advanced processes.”

Mixel will be showcasing its IP and its customers’ products at the MIPI Alliance’s annual developers conference, MIPI DevCon, on September 28-29 and TSMC OIP Ecosystem Forum on October 26-27, both to be held as virtual events.

Availability:

Mixel MIPI C-PHY/D-PHY Combo IP is available now on TSMC N5 process.

Additional Resources:
For more information on Mixel’s IP portfolio, please visit https://mixel.com/ip-cores.

About Mixel:
Mixel is a leading provider of mixed-signal IPs and offers a wide portfolio of high-performance mixed-signal connectivity IP solutions. Mixel’s mixed-signal portfolio includes PHYs and SerDes, such as MIPI D-PHY, MIPI M-PHY®, MIPI C-PHY, LVDS, and many dual mode PHY supporting multiple standards. Mixel was founded in 1998 and is headquartered in San Jose, CA, with global operation to support a worldwide customer base. For more information contact Mixel at info@mixel.com or visit www.mixel.com. You can also follow Mixel on LinkedIn, Twitter, Facebook, or YouTube.

About MIPI Alliance:
MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. There is at least one MIPI specification in every smartphone manufactured today. Founded in 2003, the organization has over 325 member companies worldwide and more than 15 active working groups delivering specifications within the mobile ecosystem. Members of the organization include handset manufacturers, device OEMs, software providers, semiconductor companies, application processor developers, IP tool providers, automotive OEMs, and Tier 1 suppliers, test, and test equipment companies, as well as camera, tablet, and laptop manufacturers. For more information, please visit www.mipi.org.

Mixel® and the Mixel logo are registered trademarks of Mixel, Inc.
MIPI®, CSI-2® and M-PHY® are registered trademarks owned by MIPI Alliance. DSI-2SM, C-PHYSM and D-PHYSM are service marks of MIPI Alliance.

Press Contacts:
Justin Endo
Mixel, Inc.
T: (408) 436-8500 x117
Justin.e@mixel.com
 
Back
Top