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My take on this is they probably looked at their limited engineering pool and decided to use it for getting the next gen product after Falcon Shores out in as good of shape as possible.
I thought they had some layoffs in engineering a year or two ago. Also some pay reductions that may have bled some talent. They are also splitting into two companies and competing in more segments than before. And CPUs are getting more complex (with some offsets). I would think this would all lead to spreading existing engineers more thinly than in the past?
I thought they had some layoffs in engineering a year or two ago. Also some pay reductions that may have bled some talent. They are also splitting into two companies and competing in more segments than before. And CPUs are getting more complex (with some offsets). I would think this would all lead to spreading existing engineers more thinly than in the past?
Intel, and a lot of big companies, do periodic thinning of the teams to trim the lower performers to make budget space for new hires. I don't think the pay reductions were significant for the majority of engineers. It was mostly very senior people who saw significant pay cuts.
Splitting of the two companies was irrelevant, IMO, since design engineers, even the analog EE teams, don't seem to wander into manufacturing. Or they didn't when I was there.
I also don't think datacenter CPUs are getting much more complicated from a digital design perspective, though chiplets do complicate up some functions, like simulation, architecture, analog, packaging work, etc. Some things are scaling up, like core counts, cache, memory channels, and PCIe controllers, but, maybe it's just me, CPUs don't seem to be evolving that much. Integrated NPUs for client CPUs are an added complexity, but NPU cores seem simpler than out-of-order superscalar CPU cores. So I'm not convinced digital engineers are being spread more thinly, though I suspect the demands for more analog EE people are increasing, perhaps by a lot.